SPRAD67A december 2022 – july 2023 AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
The processor can be reset in several ways. The methods are described in detail in the device-specific data sheet and TRM.
The processor includes three external reset input pins (MCU_PORz (MCU Domain cold reset), MCU_RESETz (MCU Domain warm reset) and RESET_REQz (Main Domain external warm reset request input)).
Be sure to provide the terminations to the reset inputs as recommended in the Pin Connectivity Requirements section of the device-specific data sheet.
The processor also includes three reset status output pins (MCU_RESETSTATz (MCU Domain warm reset status output), PORz_OUT (Main Domain POR status output) and RESETSTATz (Main Domain warm reset status output)).
Reset status outputs when not used does not need external pull (OK to connect a test point for board testing).
For MCU_PORz (fail-safe), 3.3 V input can be applied, but the input thresholds are still a function of the 1.8 V IO supply voltage (VDDS_OSC).
MCU_PORz reset input signal has input slew rate requirement specified in the device-specific data sheet.
Additional reset modes are available through internal registers and emulation.