SPRUIY9B May   2021  – October 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Key Features
  5. 2EVM Revisions and Assembly Variants
  6. 3Important Usage Notes
  7. 4System Description
    1. 4.1 Key Features
    2. 4.2 Functional Block Diagram
    3. 4.3 Power-On/Off Procedures
      1. 4.3.1 Power-On Procedure
      2. 4.3.2 Power-Off Procedure
    4. 4.4 Peripheral and Major Component Description
      1. 4.4.1  Clocking
        1. 4.4.1.1 Ethernet PHY Clock
        2. 4.4.1.2 AM64x SoC Clock
      2. 4.4.2  Reset
      3. 4.4.3  Power
        1. 4.4.3.1 Power Input
        2. 4.4.3.2 USB Type-C Interface for Power Input
        3. 4.4.3.3 Power Fault Indication
        4. 4.4.3.4 Power Supply
        5. 4.4.3.5 Power Sequencing
        6. 4.4.3.6 Power Supply
      4. 4.4.4  Configuration
        1. 4.4.4.1 Boot Modes
      5. 4.4.5  JTAG
      6. 4.4.6  Test Automation
      7. 4.4.7  UART Interface
      8. 4.4.8  Memory Interfaces
        1. 4.4.8.1 LPDDR4 Interface
        2. 4.4.8.2 MMC Interface
          1. 4.4.8.2.1 Micro SD Interface
          2. 4.4.8.2.2 WiLink Interface
          3. 4.4.8.2.3 OSPI Interface
          4. 4.4.8.2.4 Board ID EEPROM Interface
      9. 4.4.9  Ethernet Interface
        1. 4.4.9.1 DP83867 PHY Default Configuration
        2. 4.4.9.2 DP83867 – Power, Clock, Reset, Interrupt and LEDs
        3. 4.4.9.3 Industrial Application LEDs
      10. 4.4.10 USB 3.0 Interface
      11. 4.4.11 PRU Connector
      12. 4.4.12 User Expansion Connector
      13. 4.4.13 MCU Connector
      14. 4.4.14 Interrupt
      15. 4.4.15 I2C Interface
      16. 4.4.16 IO Expander (GPIOs)
  8. 5Known Issues
    1. 5.1 Issue 1: LP8733x Max output Capacitance Spec Exceeded on LDO0 and LDO1
    2. 5.2 Issue 2: LP8733x Output Voltage of 0.9V Exceeds AM64x VDDR_CORE max Voltage Spec of 0.895 V
    3. 5.3 Issue 3 - SDIO Devices on MMC0 Require Careful Trace Lengths to Meet Interface Timing Requirements
    4. 5.4 Issue 4 - LPDDR4 Data Rate Limitation in Stressful Conditions
    5. 5.5 Issue 5 - Junk Character
    6. 5.6 Issue 6 - Test Power Down Signal Floating
    7. 5.7 Issue 7 - uSD Boot Not Working
  9. 6Regulatory Compliance
  10. 7Revision History

2 EVM Revisions and Assembly Variants

The various AM64 SK EVM PCB design revisions, and assembly variants are listed in Table 5-3. Specific PCB revision is indicated in silkscreen on the PCB. Specific assembly variant is indicated with an additional sticker label. Table 2-2 lists known board issues.

Table 2-1 AM64 SK EVM PCB Design Revisions, and Assembly Variants
PCB Revision Revision and Assembly Variant Description
PROC100E1 First prototype, early release revision of the AM64 SK EVM. Used a blue solder mask.Implements the Sitara™ AM6442 MPU.
PROC100E2 First production release of the AM64 SK EVM. Uses a white solder mask. Implements the Sitara AM6442 MPU.
PROC100E3 Production release of the SK-AM64 EVM. Uses a Red solder mask. Implements the Sitara AM64x MPU with two PMIC power solution.
PROC100E4 Prototype revision of SK-AM64 EVM. Used a Green solder mask. Implements the Sitara AM64x MPU with single PMIC power solution.
PROC100A Production release of SK-AM64B EVM. Used a Red solder mask. Implements the High-Security Field-Securable (HS-FS) silicon Sitara AM64x MPU with single PMIC power solution.
Table 2-2 Summary of Known Issues
ID Severity Summary HW Versions Affected Fix
1 HIGH AM64x power requirements not met by power solution E1, E2, E3 E4
2 HIGH AM64x voltage spec not met E1, E2, E3 E4
3 INFO Do not use MMC0 for SDIO devices E1, E2 E3
4 MEDIUM LPDDR4 data rate limitation under stressful benchmarking conditions E1, E2 E3
5 INFO Junk Character on UART Console E3 E3A
6 MEDIUM Test power down signal is floating E4 RevA
7 HIGH uSD boot not working Rev A N/A