SPRUJ31 april   2022

 

  1.   1
  2.   C2000 F28003x Series LaunchPad Development Kit
  3.   Trademarks
  4. 1Board Overview
    1. 1.1 Kit Contents
    2. 1.2 Features
    3. 1.3 Specifications
    4. 1.4 Using the F28003x LaunchPad
    5. 1.5 BoosterPacks
    6. 1.6 Hardware Revisions
      1. 1.6.1 Revision A
  5. 2Software Development
    1. 2.1 Software Tools and Packages
    2. 2.2 F28003x LaunchPad Demo Program
    3. 2.3 Programming and Running Other Software on the F28003x LaunchPad
  6. 3Hardware Description
    1. 3.1 Functional Description and Connections
      1. 3.1.1  Microcontroller
      2. 3.1.2  Power Domains
      3. 3.1.3  LEDs
      4. 3.1.4  Encoder Connectors
      5. 3.1.5  FSI
      6. 3.1.6  CAN
      7. 3.1.7  CLB
      8. 3.1.8  Boot Modes
      9. 3.1.9  BoosterPack Sites
      10. 3.1.10 Analog Voltage Reference Header
      11. 3.1.11 Other Headers and Jumpers
        1. 3.1.11.1 USB Isolation Block
        2. 3.1.11.2 BoosterPack Site 2 Power Isolation
        3. 3.1.11.3 Alternate Power
    2. 3.2 Debug Interface
      1. 3.2.1 XDS110 Debug Probe
      2. 3.2.2 XDS110 Output
      3. 3.2.3 Virtual COM Port
    3. 3.3 Alternate Routing
      1. 3.3.1 Overview
      2. 3.3.2 UART Routing
      3. 3.3.3 EQEP Routing
      4. 3.3.4 CAN Routing
      5. 3.3.5 FSI Routing
      6. 3.3.6 X1/X2 Routing
      7. 3.3.7 PWM DAC
  7. 4Board Design
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 BOM
    4. 4.4 LAUNCHXL-F280039C Board Dimensions
  8. 5Frequently Asked Questions
  9. 6References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design

3.1.11.1 USB Isolation Block

JP1 is provided to enable isolation between the device and the connected USB in higher-voltage applications. The area of isolation is defined by the white outline in the upper-left corner of the LaunchPad. JP1 has two removable shunts to separate the GND and 5 V power of the USB region and the XDS110 and F28003x MCU region of the LaunchPad. By default, both shunts are populated and the power is supplied by the connected USB, meaning that the USB is NOT isolated from the XDS110 and F28003x MCU regions. If power isolation is desired, remove the supplied shunts from JP1. In this configuration, one of the two external power options below are required:

  • An external 5 V supply to power the 3.3 V LDO (TPS7A3701), which provides 3.3 V to the XDS110 and F28003x MCU regions of the board.
  • An external 3.3 V supply to power the XDS110 and F28003x MCU regions of the board.

Some applications may not require 5 V to be supplied to the MCU region. In an isolated power application with JP1 shunts removed, supplying 5 V to the XDS110 and F28003x MCU regions is optional.