SPRUJ40D May   2022  – August 2025

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
  6. 2Hardware
    1. 2.1 System Description
      1. 2.1.1 Key Features
        1. 2.1.1.1 Thermal Compliance
        2. 2.1.1.2 Processor
        3. 2.1.1.3 Power Supply
        4. 2.1.1.4 Memory
        5. 2.1.1.5 JTAG/Emulator
        6. 2.1.1.6 Supported Interfaces and Peripherals
        7. 2.1.1.7 Expansion Connectors/Headers to Support Application Specific Add‐On Boards
      2. 2.1.2 Functional Block Diagram (SK-AM62 and SK-AM62B)
      3. 2.1.3 Functional Block Diagram (SK-AM62-P1 and SK-AM62B-P1)
      4. 2.1.4 AM62x SKEVM Interface Mapping
      5. 2.1.5 Power ON/OFF Procedures
        1. 2.1.5.1 Power-On Procedure
        2. 2.1.5.2 Power-Off Procedure
        3. 2.1.5.3 Power Test Points
      6. 2.1.6 Peripheral and Major Component Description
        1. 2.1.6.1  Clocking
          1. 2.1.6.1.1 Peripheral Ref Clock
        2. 2.1.6.2  Reset
        3. 2.1.6.3  OLDI Display Interface
        4. 2.1.6.4  CSI Interface
        5. 2.1.6.5  Audio Codec Interface
        6. 2.1.6.6  HDMI Display Interface
        7. 2.1.6.7  JTAG Interface
        8. 2.1.6.8  Test Automation Header
        9. 2.1.6.9  UART Interface
        10. 2.1.6.10 USB Interface
          1. 2.1.6.10.1 USB 2.0 Type A Interface
          2. 2.1.6.10.2 USB 2.0 Type C Interface
        11. 2.1.6.11 Memory Interfaces
          1. 2.1.6.11.1 DDR4 Interface
          2. 2.1.6.11.2 OSPI Interface
          3. 2.1.6.11.3 MMC Interfaces
            1. 2.1.6.11.3.1 MMC0 - eMMC Interface
            2. 2.1.6.11.3.2 MMC1 - Micro SD Interface
            3. 2.1.6.11.3.3 MMC2 - Wilink Interface
          4. 2.1.6.11.4 EEPROM
        12. 2.1.6.12 Ethernet Interface
          1. 2.1.6.12.1 CPSW Ethernet PHY 2 Default Configuration
          2. 2.1.6.12.2 CPSW Ethernet PHY 1 Default Configuration
        13. 2.1.6.13 GPIO Port Expander
        14. 2.1.6.14 GPIO Mapping
        15. 2.1.6.15 Power
          1. 2.1.6.15.1 Power Requirements
          2. 2.1.6.15.2 Power Input
          3. 2.1.6.15.3 Power Supply
          4. 2.1.6.15.4 Power Sequencing
          5. 2.1.6.15.5 AM62x SoC Power
          6. 2.1.6.15.6 Current Monitoring
        16. 2.1.6.16 AM62x SKEVM User Setup/Configuration
          1. 2.1.6.16.1 EVM DIP Switches
          2. 2.1.6.16.2 Boot Modes
          3. 2.1.6.16.3 User Test LEDs
        17. 2.1.6.17 Expansion Headers
          1. 2.1.6.17.1 PRU Connector
          2. 2.1.6.17.2 User Expansion Connector
          3. 2.1.6.17.3 MCU Connector
        18. 2.1.6.18 Interrupt
        19. 2.1.6.19 I2C Address Mapping
  7. 3Additional Information
    1. 3.1 EVM Revisions and Assembly Variants
    2. 3.2 Known Issues and Modifications
      1. 3.2.1  Issue 1 - HDMI/DSS Incorrect Colors on E1
      2. 3.2.2  Issue 2 - J9 and J10 Header Alignment on E1
      3. 3.2.3  Issue 3 - USB Boot descoped on E1
      4. 3.2.4  Issue 4 - OLDI Connector Orientation and Pinout
      5. 3.2.5  Issue 5 - Bluetooth descoped on E2 EVMs
      6. 3.2.6  Issue 6 - Ethernet PHY CLK Skew Default Strapping Changes
      7. 3.2.7  Issue 7 - TEST_POWERDOWN changes
      8. 3.2.8  Issue 8 - MMC1_SDCD spurious interrupts
      9. 3.2.9  Issue 9 - PD Controller I2C2 IRQ Not Pinned Out
      10. 3.2.10 Issue 10 - INA Current Monitor Adress Changes
      11. 3.2.11 Issue 11 - Test Automation I2C Buffer Changes
    3. 3.3 Trademarks
    4.     84
  8. 4Compliance and Certifications
    1. 4.1 EMC, EMI and ESD Compliance
    2.     Regulatory Compliance
  9. 5Revision History
2.1.6.15.2 Power Input

Both Type-C Connectors (VBUS and CC lines) are connected to a Dual PD controller Mfr Part# TPS65988. The TPS65988 is a stand-alone USB Type-C and Power Delivery (PD) controller providing cable plug and orientation detection for two USB Type-C Connectors. Upon cable detection, the TPS65988 communicates on the CC wire using the USB PD protocol. When cable detection and USB PD negotiation are complete, the TPS65988 enables the appropriate power path. The two internal power paths of TPS65988 are configured as sink paths for the two Type-C ports and an external FET path is provided for Type-C CONN 2 to source 5 V when acting as DFP. The external FET path is controlled by GPIO17/PP_EXT2 of the PD controller.

TPS65988 PD controller can provide an output of 3A (15 V max) through CC negotiation. The VBUS pins from both the Type C connectors are connected to the VBUS pins of the PD controller. The output of the PD is VMAIN which is given to on board Buck-Boost and Buck regulators to generate fixed 5 V and 3.3 V supply for the SKEVM board.

SK-AM62, SK-AM62B, SK-AM62B-P1

The following sections describe the power distribution network topology that supplies the SKEVM board, supporting components and reference voltages.

The AM62x SKEVM board includes a power solution based on discrete power supply components. The initial stage of the power supply will be VBUS voltage from either of the two USB Type C connectors J11 and J13. USB Type-C Dual PD controller of Mfr. Part# TPS65988DHRSHR is used for negotiation of the required power to the system.

Buck-Boost controller LM34936RHFR and Buck converter LM61460-Q1 are used for the generation of 5V and 3.3V respectively and the input to the regulators is the PD output. These 3.3 V and 5 V are the primary voltages for the AM62x SKEVM Board power resources.

The 3.3 V supply generated from the Buck regulator LM61460-Q1 is the input supply to the Various SoC regulators and LDOs. The 5 V supply generated from the Buck Boost regulator LM34936RHFR is used for powering the onboard peripherals

Voltage divider network is used to provide the DDR_VREFCA (0.6 V) supply for the DDR4.

Discrete regulators and LDOs used on Board are:

  • TPS62824DMQR – To generate VDD_2V5 rail for PHY and DDR peripherals
  • TLV75510PDQNR – To generate VDD_1V0 for Ethernet PHYs
  • TLV75511PDQNR – To generate VDD_1V1 for USB HUB
  • TLV75512PDQNR – To generate VDD_1V2 for HDMI Transmitter
  • TPS74518PQWDRVRQ1 – To generate 1.8 V Analog supply for SoC
  • TPS6282518DMQR – To generate 1.8V IO supply for SoC
  • TLV7103318QDSERQ1 – To generate VDDSHV5_MMC1(SD interface) supply for SoC
  • TPS62824DMQR – To generate DDR supply for SoC and DDR
  • TPS62826DMQR – To generate Core supply for SoC
  • TPS74501PDRVR – To generate VDDR_CORE supply for SoC

Dedicated regulators are also provided on the board for:

  • TPS62177 Regulator - Powering the always on circuits of Test Automation Section
  • TLV75518 LDO -e-Fuse programming of SoC
  • TPS79601 LDO - XDS110 On board emulator
  • TPS73533 LDO - FT4232 UART to USB Bridge

Additionally, GPIO from the test automation header is also connected to the LM34936RHFR Enable to control ON/OFF of the SKEVM via the test automation board. It only disables the VCC_5V0 output of LM34936RHFR from which all other power supplies are derived. SoC has different IO groups. Each IO group is powered by specific power supplies as given in the table below.