SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Epwm halt enable
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| CONTROLSS_GLOBAL_CTRL | 502F 0514h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | EPWM5_HALTEN_CR5B1 | EPWM5_HALTEN_CR5A1 | EPWM5_HALTEN_CR5B0 | EPWM5_HALTEN_CR5A0 | |||
| NONE | R/W | R/W | R/W | R/W | |||
| 0h | 0h | 0h | 0h | 0h | |||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:4 | RESERVED | NONE | 0h | Reserved |
| 3 | EPWM5_HALTEN_CR5B1 | R/W | 0h | Write 1'b0: IP Halt disabled with corresponding CPU halt Write 1'b1: IP Halt enabled with corresponding CPU halt |
| 2 | EPWM5_HALTEN_CR5A1 | R/W | 0h | Write 1'b0: IP Halt disabled with corresponding CPU halt Write 1'b1: IP Halt enabled with corresponding CPU halt |
| 1 | EPWM5_HALTEN_CR5B0 | R/W | 0h | Write 1'b0: IP Halt disabled with corresponding CPU halt Write 1'b1: IP Halt enabled with corresponding CPU halt |
| 0 | EPWM5_HALTEN_CR5A0 | R/W | 0h | Write 1'b0: IP Halt disabled with corresponding CPU halt Write 1'b1: IP Halt enabled with corresponding CPU halt |