SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

5.2.9.1 MSS_TOPRCM_CLK_LOSS_STATUS Register (Offset = 28h) [reset = 100h]

Coarse detection clock loss status for RC and Crystal.

Table 2-1424 Instance Table

Instance Name	Physical Address
MSS_TOPRCM	5320 0028h

Figure 2-710 MSS_TOPRCM_CLK_LOSS_STATUS Name Register

31	30	29	28	27	26	25	24
RESERVED
NONE
0h
23	22	21	20	19	18	17	16
RESERVED
NONE
0h
15	14	13	12	11	10	9	8
RESERVED							CLK_LOSS_STATUS_RC_GOOD_BOOT
NONE							R
0h							1h
7	6	5	4	3	2	1	0
RESERVED			CLK_LOSS_STATUS_RC_CLOCK_LOSS	RESERVED			CLK_LOSS_STATUS_CRYSTAL_CLOCK_LOSS
NONE			R	NONE			R
0h			0h	0h			0h

Table 2-1425 MSS_TOPRCM_CLK_LOSS_STATUS Register Field Descriptions

Bit	Field	Type	Reset	Description
31:9	RESERVED	NONE	0h	Reserved
8	CLK_LOSS_STATUS_RC_GOOD_BOOT	R	1h	Clock status of RC clock at boot. Reset value will reflect the actual status 1 --> clock present at boot 0 --> clock not present at boot
7:5	RESERVED	NONE	0h	Reserved
4	CLK_LOSS_STATUS_RC_CLOCK_LOSS	R	0h	Coarse detection clock loss status for RC clock. Reset value will reflect the actual status 1 --> clock lost 0 --> clock good
3:1	RESERVED	NONE	0h	Reserved
0	CLK_LOSS_STATUS_CRYSTAL_CLOCK_LOSS	R	0h	Coarse detection clock loss status for Crystal clock. Reset value will reflect the actual status 1 --> clock lost 0 --> clock good