SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Interrupt Clear Shadow Register. Write 1 to clear interrupt bits.
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| MCAN0 | 5260 800Ch |
| MCAN1 | 5261 800Ch |
| MCAN2 | 5262 800Ch |
| MCAN3 | 5263 800Ch |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| NU2 | |||||||
| NU2 | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| NU2 | |||||||
| NU2 | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| NU2 | |||||||
| NU2 | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| NU2 | ICS | ||||||
| NU2 | W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:1 | NU2 | NU2 | 0h | Reserved |
| 0 | ICS | W | 0h | This bit contains the External TimeStamp Counter Overflow Interrupt status. Write '1' to clear bits. [ICS - Interrupt Clear Shadow Register] |