SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
System Status Register
This register provides status information about the module excluding the interrupt status information.
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| Instance Name | Physical Address |
|---|---|
| MMCSD0 | 4830 0114h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | RESETDONE | ||||||
| R | R | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:1 | RESERVED | R | 0h | |
| 0 | RESETDONE | R | 0h | Internal Reset Monitoring Note: the debounce clock , the system clock [OCP] and the functional clock shall be provided to the MMC/SD/SDIO host controller to allow the internal reset monitoring. 1 Reset completed. 0 Internal module reset is on-going |