SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

11.2.1.1 OTTOCAL_HRPWR Register (Offset = 42h) [reset = 0h]

HRPWM Power Register

This register is only accessible on EPWM modules with HRPWM capabilities.

Table 3-1116 Instance Table

Figure 3-525 OTTOCAL_HRPWR Name Register

Table 3-1117 OTTOCAL_HRPWR Register Field Descriptions

Bit	Field	Type	Reset	Description
15	CALPWRON	R/W	0h	MEP Calibration Power Bits [only available on ePWM1] 0:Disables MEP calibration logic in the HRPWM and reduces power consumption. 1:Enables MEP calibration logic
14:10	RESERVED_1	R	0h	Reserved
9:6	CALSEL	R/W	0h	EPWM Delay Line Selection for Calibration:
5	TESTSEL	R/W	0h	Test Mode Select Bit: This bit selects if a dummy delay is added in Oscillator Calibration mode to help reducing frequency when small delays are used:
4	CALSTS	R	0h	Calibration Status Bit: This bit, when set to 1, indicates that calibration is in progress. It is set to 0 when:
3	CNTSEL	R/W	0h	Counter Select Bit: Functionality of this bit has changed. When HRCNT0 or HRCNT1 reaches 0xFFFF, both counters are frozen. This bit will have an effect on when calibration starts:
2	CALSTART	R/W	0h	Calibration Start/Stop Bit:
1:0	CALMODE	R/W	0h	Note: CALMODE bits in HRPWM Module. Not used here.