SPRUJ53B April 2024 – September 2024 TMS320F28P550SJ , TMS320F28P559SJ-Q1
A responder node baud rate can optionally be adjusted to the detected bit rate as an option to the LIN module. The adaptive baud rate option is enabled by setting the ADAPT bit. During header reception, a responder measures the baud rate during detection of the synch field. If ADAPT bit is set, then the measured baud rate is compared to the responder node programmed baud rate and adjusted to the LIN bus baud rate if necessary.
The responder node adjusts to any measured baud rate that is within ±10% of the programmed baud rate. For example, if the expected baud rate is programmed at 20kbps, the responder node detects any baud rate between 18kbps and 22kbps and adjusts accordingly. The MBRSR register prescaler is determined by the following formula:
The LIN synchronizer determines two measurements: BRK_count and BAUD_count (Figure 29-17). These values are always calculated during the Header reception for synch field validation (Figure 29-18).
By measuring the values BRK_count and BAUD_count, a valid sync break sequence can be detected as described in Figure 29-18. The four numbered events in Figure 29-17 signal the start/stop of the synchronizer counter. The synchronizer counter uses VCLK as the time base.
The synchronizer counter is used to measure the sync break relative to the detecting node Tbit. For a responder node receiving the sync break, a threshold of 11 Tbit is used as required by the LIN protocol. For detection of the dominant data stream of the sync break, the synchronizer counter is started on a falling edge and stopped on a rising edge of the LINRX. On detection of the sync break delimiter, the synchronizer counter value is saved and then reset.
On detection of five consecutive falling edges, the BAUD_count is measured. Bit timing calculation and consistency to required accuracy is implemented following the recommendations of LIN revision 2.0. A responder node can calculate a single Tbit time by division of BAUD_count by 8. In addition, for consistency between the detected edges the following is evaluated:
BAUD_count + BAUD_count » 2 + BAUD_count » 3 ≤ BRK_count
The BAUD_count value is shifted 3 times to the right and rounded using the first insignificant bit to obtain a Tbit unit. If the ADAPT bit is set, then the detected baud rate is compared to the programmed baud rate.
During the header reception processing as illustrated in Figure 29-18, if the measured BRK_count value is less than 11 Tbit, the sync break is not valid according to the protocol for a fixed rate. If the ADAPT bit is set, then the MBRS register is used for measuring BRK_count and BAUD_count values and automatically adjusts to any allowed LIN bus rate (refer to LIN Specification Package 2.0).
The break-threshold relative to the responder node is 11 Tbit. The break is 13 Tbit as specified in LIN v1.3.
If the synch field is not detected within the given tolerances, the inconsistent-sync-field-error (ISFE) flag is set. An ISFE interrupt is generated, if enabled by the respective bit in the SCISETINT register. The ID byte can be received after the synch field validation was successful. Any time a valid break (larger than 11 Tbit) is detected, the receiver state machine can reset to reception of this new frame. This reset condition is only valid during response state, not if an additional synch break occurs during header reception.