SPRUJ53B April 2024 – September 2024 TMS320F28P550SJ , TMS320F28P559SJ-Q1
32-Bit Floating-Point Compare for Equal, Less Than or Greater Than
MRa | CLA floating-point source register (MR0 to MR3) |
MRb | CLA floating-point source register (MR0 to MR3) |
LSW: 0000 0000 0000 bbaa
MSW: 0111 1101 0000 0000
Set ZF and NF flags on the result of MRa - MRb. The MCMPF32 instruction is performed as a logical compare operation. This is possible because of the IEEE format offsetting the exponent. Basically the bigger the binary number, the bigger the floating-point value.
Special cases for inputs:
This instruction modifies the following flags in the MSTF register:
Flag | TF | ZF | NF | LUF | LVF |
---|---|---|---|---|---|
Modified | No | Yes | Yes | No | No |
The MSTF register flags are modified as follows:
If(MRa == MRb) {ZF=1; NF=0;}
If(MRa > MRb) {ZF=0; NF=0;}
If(MRa < MRb) {ZF=0; NF=1;}
This is a single-cycle instruction.
; Behavior of ZF and NF flags for different comparisons
MMOVIZ MR1, #-2.0 ; MR1 = -2.0 (0xC0000000)
MMOVIZ MR0, #5.0 ; MR0 = 5.0 (0x40A00000)
MCMPF32 MR1, MR0 ; ZF = 0, NF = 1
MCMPF32 MR0, MR1 ; ZF = 0, NF = 0
MCMPF32 MR0, MR0 ; ZF = 1, NF = 0