SPRUJ53B April 2024 – September 2024 TMS320F28P550SJ , TMS320F28P559SJ-Q1
Local shared RAMs (LSx RAMs) are secure memories and have ECC. These memories are shared between the CPU and CLA but are by default dedicated to the CPU only. CLA access can be enabled by configuring MSEL_LSx bit field in the LSxMSEL register.
Further, when these memories are shared between the CPU and CLA, the user can choose to use these memories as CLA program memory by configuring the CLAPGM_LSx bit field in the LSxCLAPGM registers. CPU access to all memory blocks, which are programmed as CLA program memory, are blocked.
All these RAMs have the access protection (CPU write and CPU fetch) feature. Each type of access protection for each RAM block can be enabled or disabled by configuring the specific bit in the local shared RAM access protection registers, mapped to each CPU subsystem. Table 3-12 shows the LSx RAM features.
MSEL_LSx | CLAPGM_LSx | CPUx Allowed Access |
CPUx.CLA1 Allowed Access |
Comment |
---|---|---|---|---|
00 | X | All | - | LSx memory is configured as CPU dedicated RAM |
01 | 0 | All | Data Read Data Write |
LSx memory is shared between CPU and CLA1 |
01 | 1 | Emulation Read Emulation Write |
Fetch Only Emulation Read Emulation Write |
LSx memory is CLA1 program memory |