SPRUJ53B April 2024 – September 2024 TMS320F28P550SJ , TMS320F28P559SJ-Q1
32-Bit Floating-Point Minimum
MRa | floating-point source/destination register (MR0 to MR3) |
#16FHi | A 16-bit immediate value that represents the upper 16-bits of an IEEE 32-bit floating-point value. The low 16-bits of the mantissa are assumed to be all 0. |
LSW: IIII IIII IIII IIII
MSW: 0111 1001 0100 00aa
Compare MRa with the floating-point value represented by the immediate operand. If the immediate value is smaller, then load the value into MRa.
if(MRa > #16FHi:0) MRa = #16FHi:0;
#16FHi is a 16-bit immediate value that represents the upper 16-bits of an IEEE 32-bit floating-point value. The low 16-bits of the mantissa are assumed to be all 0. This addressing mode is most useful for constants where the lowest 16-bits of the mantissa are 0. Some examples are 2.0 (0x40000000), 4.0 (0x40800000), 0.5 (0x3F000000), and -1.5 (0xBFC00000). The assembler accepts either a hex or float as the immediate value. That is, -1.5 can be represented as #-1.5 or #0xBFC0.
Special cases for the output from the MMINF32 operation:
This instruction modifies the following flags in the MSTF register:
Flag | TF | ZF | NF | LUF | LVF |
---|---|---|---|---|---|
Modified | No | Yes | Yes | No | No |
The ZF and NF flags are configured on the result of the operation, not the result stored in the destination register.
if(MRa == #16FHi:0) {ZF=1; NF=0;}
if(MRa > #16FHi:0) {ZF=0; NF=0;}
if(MRa < #16FHi:0) {ZF=0; NF=1;}
This is a single-cycle instruction.
MMOVIZ MR0, #5.0 ; MR0 = 5.0 (0x40A00000)
MMOVIZ MR1, #4.0 ; MR1 = 4.0 (0x40800000)
MMOVIZ MR2, #-1.5 ; MR2 = -1.5 (0xBFC00000)
MMINF32 MR0, #5.5 ; MR0 = 5.0, ZF = 0, NF = 1
MMINF32 MR1, #2.5 ; MR1 = 2.5, ZF = 0, NF = 0
MMINF32 MR2, #-1.0 ; MR2 = -1.5, ZF = 0, NF = 1
MMINF32 MR2, #-1.5 ; MR2 = -1.5, ZF = 1, NF = 0