SPRUJ53B April 2024 – September 2024 TMS320F28P550SJ , TMS320F28P559SJ-Q1
Enable CLA Write Access to EALLOW Protected Registers
none | This instruction does not have any operands |
LSW: 0000 0000 0000 0000
MSW: 0111 1111 1001 0000
This instruction sets the MEALLOW bit in the CLA status register MSTF. When this bit is set, the CLA is allowed write access to EALLOW protected registers. To again protect against CLA writes to protected registers, use the MEDIS instruction.
MEALLOW and MEDIS only control CLA write access; reads are allowed even if MEALLOW has not been executed. MEALLOW and MEDIS are also independent from the main CPU's EALLOW/EDIS. This instruction does not modify the EALLOW bit in the main CPU's status register. The MEALLOW bit in MSTF only controls access for the CLA while the EALLOW bit in the ST1 register only controls access for the main CPU.
As with EALLOW, the MEALLOW bit is overridden using the JTAG port, allowing full control of register accesses during debug from Code Composer Studio.
This instruction does not modify flags in the MSTF register.
Flag | TF | ZF | NF | LUF | LVF |
---|---|---|---|---|---|
Modified | No | No | No | No | No |
This is a single-cycle instruction.
; C header file including definition of
; the EPwm1Regs structure
;
; The ePWM TZSEL register is EALLOW protected
;
.cdecls C,LIST,"CLAShared.h"
...
_Cla1Task1:
...
MEALLOW ; Allow CLA write access
MMOV16 @_EPwm1Regs.TZSEL.all, MR3 ; Write to TZSEL
MEDIS ; Disallow CLA write access
...
...
MSTOP