SPRUJ63A September   2022  – October 2023

 

  1.   1
  2.   Trademarks
  3. 1Introduction
    1. 1.1 EVM Revisions and Assembly Variants
    2. 1.2 Inside the Box
  4. 2Important Usage Notes
    1. 2.1 Power-On Usage Note
    2. 2.2 EMC, EMI, and ESD Compliance
  5. 3System Description
    1. 3.1 Key Features
    2. 3.2 Functional Block Diagram
    3. 3.3 Power-On/Off Procedures
      1. 3.3.1 Power-On Procedure
      2. 3.3.2 Power-Off Procedure
    4. 3.4 Peripheral and Major Component Description
      1. 3.4.1  Clocking
        1. 3.4.1.1 Ethernet PHY Clock
        2. 3.4.1.2 AM64x/AM243x Clock
        3. 3.4.1.3 PCIe Clock
      2. 3.4.2  Reset
      3. 3.4.3  Power
        1. 3.4.3.1 Power Input
        2. 3.4.3.2 Reverse Polarity Protection
        3. 3.4.3.3 Current Monitoring
        4. 3.4.3.4 Power Supply
        5. 3.4.3.5 Power Sequencing
        6. 3.4.3.6 AM64x/AM243x Power
      4. 3.4.4  Configuration
        1. 3.4.4.1 Boot Modes
      5. 3.4.5  JTAG
      6. 3.4.6  Test Automation
      7. 3.4.7  UART Interfaces
      8. 3.4.8  Memory Interfaces
        1. 3.4.8.1 DDR4 Interface
        2. 3.4.8.2 MMC Interfaces
          1. 3.4.8.2.1 Micro SD Interface
          2. 3.4.8.2.2 eMMC Interface
        3. 3.4.8.3 OSPI Interface
        4. 3.4.8.4 SPI EEPROM Interface
        5. 3.4.8.5 Board ID EEPROM Interface
      9. 3.4.9  Ethernet Interface
        1. 3.4.9.1 DP83867 PHY Default Configuration
        2. 3.4.9.2 DP83869 PHY Default Configuration
        3. 3.4.9.3 Ethernet LED
      10. 3.4.10 Display Interface
      11. 3.4.11 USB 2.0 Interface
      12. 3.4.12 PCIe Interface
      13. 3.4.13 High Speed Expansion Interface
      14. 3.4.14 CAN Interface
      15. 3.4.15 Interrupt
      16. 3.4.16 ADC Interface
      17. 3.4.17 Safety Connector
      18. 3.4.18 SPI Interfaces
      19. 3.4.19 I2C Interfaces
      20. 3.4.20 FSI Interface
  6. 4Known Issues and Modifications
    1. 4.1 Issue 1 - Embedded XDS110 Connection to AM64x Target in CCS
    2. 4.2 Issue 2 - DC Barrel Jack Warning when Hot-Plugging
    3. 4.3 Issue 3 - uSD Card Boot Not Working
  7. 5References
  8. 6Revision History

3.4.8.5 Board ID EEPROM Interface

The EVM includes an onboard EEPROM (U7). This EEPROM holds identifying information include the EVM version and serial number. PHY MAC ID and other static information about the EVM are also stored in this memory.

The Board ID memory is configured to respond to address 0x50 and 0X51 is programmed with the header description and DDR information of this card. AT24CM01 from Microchip is used, this is interfaced to I2C0 port of the SOCI2C address of the EEPROM and can be modified by driving the A0, A1, A2 pins to LOW. The first 259 bytes of addressable EEPROM memory are preprogrammed with identification information for each board. The remaining 32509 bytes are available to the user for data or code storage.

Table 3-18 Board ID Memory Header Information
HeaderField NameSize (bytes)Comments
EE3355AAMAGIC4Magic Number
TYPE1Fixed length and variable position board ID header
2Size of payload
BRD_INFOTYPE1Payload type
Length2Offset to next header
Board_Name16Name of the board
Design_rev2Revision number of the design
PROC_Nbr4PROC number
Variant2Design variant number
PCB_Rev2Revision number of the PCB
SCHBOM_Rev2Revision number of the schematic
SWR_Rev2First software release number
VendorID2
Build_Week2Week of the year of production
Build_Year2Year of production
BoardID6
Serial_Nbr4Incrementing board number
DDR_INFOTYPE1
Length2Offset to next header
DDR control2DDR Control Word
MAC_ADDRTYPE1Payload type
Length2Size of payload
MAC control2MAC header control word
MAC_adrs192MAC address of AM64x/AM243x PRG2
END_LISTTYPE1End Marker