SPRUJ85A April   2024  – August 2024

PRODUCTION DATA  

  1.   1
  2.   Description
  3. 1Key Features
  4. 2LaunchPad Module Overview
    1. 3.1 Introduction
    2. 3.2 Preface: Read This First
      1. 3.2.1 If You Need Assistance
      2. 3.2.2 Important Usage Notes
    3. 3.3 Kit Contents
    4. 3.4 Device Information
      1. 3.4.1 System Architecture Overview
      2. 3.4.2 Security
      3. 3.4.3 Compliance
      4. 3.4.4 BoosterPacks
      5. 3.4.5 Component Identification
  5. 3Hardware Description
    1. 4.1  Board Setup
      1. 4.1.1 Power Requirements
        1. 4.1.1.1 Power Input Using USB Type-C Connector
        2. 4.1.1.2 Power Status LEDs
        3. 4.1.1.3 Power Tree
      2. 4.1.2 Push Buttons
      3. 4.1.3 Boot mode Selection
      4. 4.1.4 IO Expander
    2. 4.2  Functional Block Diagram
    3. 4.3  GPIO Mapping
    4. 4.4  Reset
    5. 4.5  Clock
    6. 4.6  Memory Interfaces
      1. 4.6.1 OSPI
      2. 4.6.2 MMC
      3. 4.6.3 eMMC
      4. 4.6.4 Board ID EEPROM
    7. 4.7  Ethernet Interface
      1. 4.7.1 Ethernet PHY #1 - CPSW RGMII/ICSSM
      2. 4.7.2 Ethernet PHY #2 - CPSW RGMII/ICSSM
      3. 4.7.3 LED Indication in RJ45 Connector
    8. 4.8  I2C
    9. 4.9  Industrial Application LEDs
    10. 4.10 SPI
    11. 4.11 UART
    12. 4.12 MCAN
    13. 4.13 FSI
    14. 4.14 JTAG
    15. 4.15 TIVA and Test Automation Header
    16. 4.16 LIN
    17. 4.17 ADC and DAC
    18. 4.18 EQEP and SDFM
    19. 4.19 EPWM
    20. 4.20 BoosterPack Headers
    21. 4.21 Pinmux Mapping
  6. 4Additional Information
    1.     Trademarks
    2. 5.1 Sitara MCU+ Academy
    3. 5.2 Known Board Changes/Issues
      1. 5.2.1 OSPI DQS and LBCLK nets swap
      2. 5.2.2 XDS110 Debugger Bricking Issue
      3. 5.2.3 eMMC CMD and CLK nets swap
  7. 5References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design
  8. 6Revision History

3.17 ADC and DAC

The AM263Px LaunchPad maps 20 ADC inputs to the BoosterPack header. All of the ADC inputs that are used in the LaunchPad are ESD protected.

AM263P ADC/DAC Signal Pathing Figure 3-27 ADC/DAC Signal Pathing

Seven of the ADC inputs and one instance of the DAC_OUT signal is routed to a 2:1 mux (TS3DDR3812RUAR) to offer alternate BoosterPack functionality. The select line of the mux is driven by an AM263Px SoC GPIO signal.

Table 3-20 ADC BoosterPack Mux
BP_MUX_SEL Condition Funciton of Mux
LOW ADC input/DAC_OUT Selected Port A ↔ Port B
HIGH Alternate BP functionality Selected Port A ↔ Port C

The ADC and DAC require a voltage reference. The AM263Px LaunchPad has two switches that allow the user to switch between the DAC and ADC VREF source.


AM263P ADC and DAC VREF Switches

Figure 3-28 ADC and DAC VREF Switches

The DAC VREF Switch (S1) is a single pole double throw switch that controls the input of the ADC VREF inputs of the AM263Px SoC.

Table 3-21 DAC VREF Switch
DAC VREF Switch Position Reference Selection
Pin 1-2 AM263Px on-die LDO
Pin 2-3 External DAC VREF Header

The ADC VREF Switch (S2) contains two single pole double throw switches that controls the input of the ADC VREF inputs of the AM263Px SoC.

Table 3-22 ADC VREF Switch
ADC VREF Switch Position Reference Selection
Pin 1-2 OPEN - Allow for reference to be AM263Px on-die LDO reference
Pin 2-3 External ADC VREF Header
Pin 4-5 OPEN - Allow for reference to be AM263Px on-die LDO reference
Pin 5-6 External ADC VREF Header