SPRUJA9A January 2024 – October 2024
DP83TG720-EVM-AM2 is equipped with multiple test points for hardware debug and bench testing. DP82TG720-EVM-AM2 Test Pointsshows the test points on the board and their associated signal net.
| Test Point | Signal | Description |
|---|---|---|
| TP1 | GND | Ground |
| TP2 | GND | Ground |
| TP3 | GND | Ground |
| TP4 | RXCLK | Receive Clock |
| TP5 | RXD1 | Receive Data 1 |
| TP6 | RXD3 | Receive Data 3 |
| TP7 | TXCLK | Transmit Clock |
| TP8 | RXD0 | Receive Data 0 |
| TP9 | RXD2 | Receive Data 2 |
| TP10 | CLK_OUT2 | DP83TG720S-Q1 25-MHz reference clock output |
| TP11 | GND | Ground |
| TP12 | TXEN | Transmit Enable |
| TP13 | TXD3 | Transmit Data 3 |
| TP14 | GND | Ground |
| TP15 | RXDV | RGMII Receive Control |
| TP16 | TXD1 | Transmit Data 1 |
| TP17 | TXD2 | Transmit Data 2 |
| TP18 | TXD0 | Transmit Data 0 |
| TP19 | RXER | Receive Data Error |
| TP20 | 1588_SFD | EEE 1588 SFD |
| TP21 | RXLINK | Receive Indicator |
| TP22 | MDIO_MDIO | MDIO Data |
| TP23 | INH | Inhibit |
| TP24 | RESETn | PHY Reset |
| TP25 | CRS | Carrier Sense |
| TP26 | MDIO_MDC | MDIO Clock |
| TP27 | REF_CLK | Reference Clock Input |
| TP28 | COL | Collision Detected |
| TP29 | EXT_VMON | PMIC External Voltage Monitor |
| TP30 | LED1 | Link Status and BLINK for TX/RX Activity |
| TP31 | VCC_1V0 | 1.0V PHY supply |
| TP32 | GND | Ground |