SPRUJF1C November   2024  – December 2025 AM2612

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
      1. 1.1.1 Preface: Read This First
        1. 1.1.1.1 Sitara MCU+ Academy
        2. 1.1.1.2 Important Usage Notes
    2. 1.2 Kit Contents
    3. 1.3 Device Information
      1. 1.3.1 System Architecture Overview
      2. 1.3.2 Component Identification
      3. 1.3.3 Functional Block Diagram
      4. 1.3.4 BoosterPacks
      5. 1.3.5 Device Information
        1. 1.3.5.1 Security
  7. 2Hardware
    1. 2.1  Setup
      1. 2.1.1 Standalone Configuration
    2. 2.2  Power Requirements
      1. 2.2.1 Power Input Using USB Type-C Connector
      2. 2.2.2 Power Tree
      3. 2.2.3 Power Status LEDs
    3. 2.3  Header Information
      1. 2.3.1 OSPI Expansion Connector
      2. 2.3.2 ADC/DAC External VREF Headers
      3. 2.3.3 FSI Header
      4. 2.3.4 EQEP Headers
    4. 2.4  Push Buttons
    5. 2.5  Reset
    6. 2.6  Clock
    7. 2.7  Boot Mode Selection
    8. 2.8  GPIO Mapping
    9. 2.9  IO Expander
    10. 2.10 Interfaces
      1. 2.10.1  Memory Interfaces
        1. 2.10.1.1 OSPI
        2. 2.10.1.2 Board ID EEPROM
      2. 2.10.2  Ethernet Interface
        1. 2.10.2.1 Ethernet PHY 0 - RGMII2 / PR0_PRU0
        2. 2.10.2.2 Ethernet PHY 1 - RGMII1 / PR0_PRU1
      3. 2.10.3  I2C
        1. 2.10.3.1 Industrial Application LEDs
      4. 2.10.4  SPI
      5. 2.10.5  UART
      6. 2.10.6  MCAN
      7. 2.10.7  SDFM
      8. 2.10.8  FSI
      9. 2.10.9  JTAG
      10. 2.10.10 Test Automation Pin Mapping
      11. 2.10.11 LIN
      12. 2.10.12 ADC and DAC
      13. 2.10.13 EQEP
      14. 2.10.14 EPWM
      15. 2.10.15 USB
    11. 2.11 BoosterPack Headers
      1. 2.11.1 BoosterPack Mode 00: Standard LaunchPad/BoosterPack Pinout
      2. 2.11.2 BoosterPack Mode 01: Servo Motor Control BoosterPacks Mode
      3. 2.11.3 BoosterPack Mode 10: BOOSTXL-IOLINKM-8 Mode
      4. 2.11.4 BoosterPack Mode 11: C2000 DRVx BoosterPacks Mode
    12. 2.12 Pinmux Mapping
    13. 2.13 Test Points
    14. 2.14 Best Practices
  8. 3Software
  9. 4Hardware Design Files
  10. 5Compliance
  11. 6Additional Information
    1. 6.1 Revision E1 Appendix
      1. 6.1.1 TA_POWERDOWNz pulled up by VSYS_TA_3V3 which is powered by VSYS_3V3
      2. 6.1.2 USB2.0_MUX_SEL0 pulled up by R355
      3. 6.1.3 MDIO and MDC of PRU0-ICSS0 needs to be routed to both Ethernet PHYs
      4. 6.1.4 AM261_RGMII1_RXLINK and AM261_RGMII2_RXLINK to be connected to GPIO
    2. 6.2 Revision E2 Appendix
      1. 6.2.1 Revision E2 Changes from E1
      2. 6.2.2 Revision E2 Known Limitations
    3. 6.3 Revision A Appendix
      1. 6.3.1 Revision A Changes from E2
      2. 6.3.2 Revision A Errata
    4.     Trademarks
  12. 7References
    1. 7.1 Reference Documents
    2. 7.2 Other TI Components Used in This Design
  13. 8Revision History

2.9 IO Expander

The AM261x LaunchPad has two TCA6408ARGTR IO Expanders that provide general-purpose I/O expansion and bidirectional voltage translation for processors through I2C communication.

The TCA6408A consists of one 8-bit Configuration (input or output selection), Input, Output, and Polarity Inversion (active high) Register. At power on, the I/Os are configured as inputs. The system controller can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input or Output Register. The polarity of the Input Port Register can be inverted with the Polarity Inversion Register. All registers can be read by the system controller. The AM261x MCU communicates with the IO Expander through the I2C0 bus. The signals coming out of the IO Expander are shown in Figure 2-12. Refer to the TCA6408ARGTR Data sheet for the programming guide for TCA6408ARGTR.

LP-AM261 IO Expander Figure 2-12 IO Expander

Table 2-15 IO Expander 1 GPIO Mapping (U42)
IO# Net Name GPIO Description Active Status
P0 BP_MUX_SW_S6 Alternate BoosterPack function mux U81 select PREFERABLE
P1 ETH0_CPSW2_RST DP83869 PHY (U73) Reset LOW
P2 ETH1_CPSW1_RST DP83869 PHY (U74) Reset LOW
P3 MDIO/MDC_MUX_SEL MDIO/MDC mux select PREFERABLE
P4 BP_MUX_SW_S4 Alternate BoosterPack function mux U46 select PREFERABLE
P5 BP_MUX_SW_S5 Alternate BoosterPack function mux U80 select PREFERABLE
P6 FSI_EQEP_MUX_SEL FSI/EQEP mux select PREFERABLE
P7 OSPI1_MUX_SEL OSPI1 mux select PREFERABLE
Table 2-16 IO Expander 2 GPIO Mapping (U23)
IO# Net Name GPIO Description Active Status
P0 USB2.0_MUX_SEL0 USB mux select PREFERABLE
P1 VPP_LDO_EN 1.7V LDO enable HIGH
P2 LED_DRIVER_EN LED driver enable LOW
P3 MCAN_MUX_SEL MCAN mux select PREFERABLE
P4 BP_BO_MUX_EN EPWM bidirectional level translator enable HIGH
P5 BP_MUX_SW_S1 Input 1 to XOR gate controlling alternate boosterpack function mux PREFERABLE
P6 BP_BO_MUX_EN_N Alternate boosterpack function mux output enable LOW
P7 BP_MUX_SW_S0 Input 0 to XOR gate controlling alternate boosterpack function mux PREFERABLE