The below sections describe the individual signal paths in this design. See Figure 2-1 for overall signal connectivity.

I2C Configuration Interface

The AEC I2C management bus I2C interface (pins 18 and 20) is used to control and configure the TAS67x Device 0 (TAS0, U7), TAS67x Device 1 (TAS1, U5) and an onboard 4Kbit EEPROM (CAT24C04WI-GT3, U4).

MCASP TDM Data Interface

A subset of the AEC MCASPX interface is used to stream TDM audio data to the TAS67x Device 0 (TAS0, U7), TAS67x Device 1 (TAS1, U5) and stream amplifier telemetry data back to the host processor.

The AEC MCASPX_AX0 signal provides a TDM bitstream and synchronous bit block to a set of LMK1C1102 (U1, U3) 1:2 buffers. These buffers direct the bitstream to both TAS0 and TAS1. Likewise the AEC MCASPX_FSX frame-sync signal feeds an LMK1C1104 (U2) 1:4 buffer, providing frame synchronization to both TAS0 and TAS1 and providing feedback framesync signals ECAP_FRAMESYNC1 and ECAP_FRAMESYNC2 for the host processor through the AEC interface.

Finally, TAS0 outputs to AEC MCASPX_AR2 and TAS1 outputs to AEC MCASPX_AR3. These RX bitstreams carry optional, realtime amplifier telemetry data back to the host processor.

TAS67x Audio Output

An array of standard 4mm, banana plug binding posts are provided for quick speaker attachment to each of the TAS67x audio outputs. These are implemented as color coded posts, with Keystone model 7006 RED for positive output and model 7007 BLACK for negative output. PCB silkscreen is also provided to help guide connections during system setup.

Figure 2-6 and Table 2-8 describe this output array.