SPRZ455F December 2020 – February 2025 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1
C7x: LBIST MISR changed on SR2.0
If C7x LBIST is used in software, the expected MISR signature is different comparing SR1.x to SR2.0. The SR1.x and SR2.0 expected MISRs are as follows:
The other LBIST MISRs have been reviewed and are the same comparing SR1.x and SR2.0.
The reason for the change is that J721E SR2.0 includes a change to to the Power Sleep Controller (PSC) logic in the C7x to allow reset to be “forced”.
Software should use the appropriate MISR value based on the silicon revision.