SPRZ578A December   2024  – July 2025 AM2752-Q1 , AM2754-Q1

 

  1.   1
  2.   Abstract
  3. 1Usage Notes and Advisories Matrices
    1. 1.1 Devices Supported
  4. 2Silicon Revision Usage Notes and Advisories
    1. 2.1 Silicon Usage Notes
      1.      i2284
      2.      i2351
      3.      i2424
    2. 2.2 Silicon Advisories
      1.      i2049
      2.      i2062
      3.      i2120
      4.      i2137
      5.      i2189
      6.      i2196
      7.      i2199
      8.      i2249
      9.      i2253
      10.      i2278
      11.      i2279
      12.      i2310
      13.      i2311
      14.      i2312
      15.      i2377
      16.      i2383
      17.      i2401
      18.      i2427
      19.      i2431
      20.      i2435
      21.      i2436
      22.      i2438
      23.      i2449
      24.      i2455
  5. 3Trademarks
  6. 4Revision History

i2455

PWM: The eint interrupt from all three PWM are not routed to main Pulsar

Details:

EPWM's eint interrupts are only routed to two C7xs and Device Manager (DM) R5. However, those interrupts are not routed to Main Pulsar R5FSS0 and R5FSS1.

Workaround(s):

Among any of the processors receiving eint interrupt, use one of the following methods:

  • DM R5 to manage EPWM0-EPWM2 eint
  • DM R5 Interrupt Service Routine to pass the PWM eint interrupt to Main Pulsar. There are two examples of how to the pass the eint interrupts below:
  1. Translate the PWM eint into GPIO interrupt using dedicated GPIO pins and programming the MAIN GPIO mux to route the interrupts to MAIN Pulsar
  2. Translate the PWM eint into an IPC message through Mailbox to Main Pulsar