SPRZ579A July   2025  – October 2025 F28E120SB , F28E120SC

 

  1.   1
  2.   TMS320F28003x Real-Time MCUs Silicon ErrataSilicon Revision 0
  3. 1Usage Notes and Advisories Matrices
    1. 1.1 Usage Notes Matrix
    2. 1.2 Advisories Matrix
  4. 2Nomenclature, Package Symbolization, and Revision Identification
    1. 2.1 Device and Development-Support Tool Nomenclature
    2. 2.2 Devices Supported
    3. 2.3 Package Symbolization and Revision Identification
  5. 3Silicon Revision 0 Usage Notes and Advisories
    1. 3.1 Silicon Revision 0 Usage Notes
      1. 3.1.1 PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU Interrupt Mask Clear
      2. 3.1.2 Caution While Using Nested Interrupts With Repeat Block
      3. 3.1.3 Security: The primary layer of defense is securing the boundary of the chip, which begins with enabling JTAGLOCK and Zero-pin Boot to Flash feature
    2. 3.2 Silicon Revision 0 Advisories
      1.      Advisory
      2.      Advisory
      3.      Advisory
      4.      Advisory
      5.      Advisory
      6.      Advisory
      7. 3.2.1 Advisory
      8.      Advisory
      9.      Advisory
      10.      Advisory
      11.      Advisory
      12.      Advisory
      13.      Advisory
      14.      Advisory
      15.      Advisory
  6. 4Documentation Support
  7. 5Trademarks
  8. 6Revision History

2.3 Package Symbolization and Revision Identification

Figure 2-1, Figure 2-2, and Figure 2-3 show the package symbolization. Table 2-1 lists the silicon revision codes.

F28E120SC F28E120SB Package Symbolization for PT Package
Note: F28E120SCTPT units with YM = '5A' were incorrectly printed with Silicon Revision Code = 'A'. These units are silicon revision 0 (# is blank).
Figure 2-1 Package Symbolization for PT Package
F28E120SC F28E120SB Package Symbolization for VFC Package Figure 2-2 Package Symbolization for VFC Package
F28E120SC F28E120SB Package Symbolization for RHB Package Figure 2-3 Package Symbolization for RHB Package
Table 2-1 Revision Identification
SILICON REVISION CODESILICON REVISIONREVID(1)
Address: 0x5D006		COMMENTS(2)
Blank00x0000 0001This silicon revision is available as TMX and TMS.
(1) Silicon Revision ID
(2) For orderable device numbers, see the PACKAGING INFORMATION table in the F28E12x Real-Time Microcontrollers data sheet.