For narrow band systems it could be required to modify the phase noise shaping by adjusting the loop bandwidth. Higher loop bandwidth gives better close-in phase noise. For some systems it could be required to have different loop bandwidth in RX and TX since getting a good result for TX parameters (ACP, close in spurs) may require a different loop BW than getting good close in selectivity in RX.

The overrides below are valid for CC13x2. If a loop bandwidth that are not listed below is needed, please make a request.

Loop bandwidth: 20 kHz

//Synth: Set loop bandwidth after lock to 20 kHz (K2)
(uint32_t)0x0A480583,
//Synth: Set loop bandwidth after lock to 20 kHz (K2)
(uint32_t)0x000005A3,
//Synth: Set loop bandwidth after lock to 20 kHz (K3, LSB)
(uint32_t)0x7AB80603,
//Synth: Set loop bandwidth after lock to 20 kHz (K3, MSB)
(uint32_t)0x00000623,
//Synth: Set FREF = 8 MHz
(uint32_t)0x000684A3,

Loop bandwidth: 40 kHz

//Synth: Set loop bandwidth after lock to 40 kHz (K2)
(uint32_t)0x29200583,
//Synth: Set loop bandwidth after lock to 40 kHz (K2)
(uint32_t)0x000005A3,
//Synth: Set loop bandwidth after lock to 40 kHz (K3, LSB)
(uint32_t)0xF5700603,
//Synth: Set loop bandwidth after lock to 40 kHz (K3, MSB)
(uint32_t)0x00000623,
//Synth: Set FREF = 4 MHz
(uint32_t)0x000C84A3,

Loop bandwidth: 60 kHz

//Synth: Set loop bandwidth after lock to 60 kHz (K2)
(uint32_t)0x5C870583,
//Synth: Set loop bandwidth after lock to 60 kHz (K2)
(uint32_t)0x000005A3,
//Synth: Set loop bandwidth after lock to 40 kHz (K3, LSB)
(uint32_t)0x70280603,
//Synth: Set loop bandwidth after lock to 40 kHz (K3, MSB)
(uint32_t)0x00010623,
//Synth: Set FREF = 4 MHz
(uint32_t)0x000C84A3,

Loop bandwidth: 80 kHz

//Synth: Set loop bandwidth after lock to 80 kHz (K2)
(uint32_t)0xA47E0583,
//Synth: Set loop bandwidth after lock to 80 kHz (K2)
(uint32_t)0x000005A3,
// Synth: Set loop bandwidth after lock to 80 kHz (K3, LSB)
(uint32_t)0xEAE00603,
//Synth: Set loop bandwidth after lock to 80 kHz (K3, MSB)
(uint32_t)0x00010623,
//Synth: Set FREF = 8 MHz
(uint32_t)0x000684A3,

Loop bandwidth: 150 kHz

//Synth: Set loop bandwidth after lock to 150 kHz (K2)
(uint32_t)0x424C0583,
//Synth: Set loop bandwidth after lock to 150 kHz (K2)
(uint32_t)0x000205A3,
//Synth: Set loop bandwidth after lock to 150 kHz (K3, LSB)
(uint32_t)0x98630603,
//Synth: Set loop bandwidth after lock to 150 kHz (K3, MSB)
(uint32_t)0x00030623,
//Synth: Set FREF = 8 MHz
(uint32_t)0x000684A3,

Loop bandwidth: 200 kHz

//Synth: Set loop bandwidth after lock to 200 kHz (K2)
(uint32_t)0x04150583,
//Synth: Set loop bandwidth after lock to 200 kHz (K2)
(uint32_t)0x000405A3,
//Synth: Set loop bandwidth after lock to 200 kHz (K3, LSB)
(uint32_t)0xCB2F0603,
//Synth: Set loop bandwidth after lock to 200 kHz (K3, MSB)
(uint32_t)0x00040623,
// Synth: Set FREF = 8 MHz
(uint32_t)0x000684A3,

Other overrides:

In some cases better results can be achieved using FREF dithering:

//Synth: Set FREF dither = 9.6 MHz
(uint32_t)0x000584B3,

Using an IIR filter will help reducing the phase noise outside the loop filter BW but will increase the power consumption some. If the far out phase noise is too high with the settings given above the overrides below could be tested.

//Two word override starting from LoopCoeff
HW32_ARRAY_OVERRIDE(0x4028,2),
// IIR EN, 2nd order, IIR_FILT_BW=1
(uint32_t)0x38000000,
//Set RFC_FSCA:PLLCTL0.IIR_CLK_DIV to 1
(uint32_t)0x01608402,