Revision History

Changes from Revision C (February 2021) to Revision D (November 2022)

• Figure 3-1 (Example of Device Part Markings): Removed repetitions of Line 1 and Line 2Go
• Advisory to Silicon Variant/Revison Map: Added MSS#41, MSS#42A, MSS#43A, MSS#44A, MSS#45, MSS#50 and MSS#51 advisories, all silicon revisions in "Main Subsystem" Go
• Advisory to Silicon Variant/Revison Map: Updated/Revised MSS#37B, and MSS#38A, all silicon revisions in "Main Subsytem" Go
• Advisory to Silicon Variant/Revison Map: Updated/Revised ANA#11B, ANA#12A, ANA#13B, ANA#17A, ANA#18B, and ANA#22A, all silicon revisions in "Main Subsytem" Go
• Advisory to Silicon Variant/Revison Map: Removed ANA#08B, all silicon revisions in "Analog/ Millimeter Wave" Category Go
• Updated MSS#37B: Updated and revised the workaround. Abnormal frequencies can be ignored for erroneous results. Go
• Updated MSS#38A: Updated and revised the description and workaround. The glitch occurs only if 3.3V supply powers up before the 1.8V supplyGo
• Added MSS#41: Issuing WARM_RESET can cause Bootloader Failure which results in failure to load the application from Serial FlashGo
• Added MSS#42A: DSP L2 memory initialization can reoccur on execution DSP self test (STC) OR DSP Power cycling execution by applicationGo
• Added MSS#43A:: Read-data from internal registers of PCR is not reliable. Shared PCS region protection is also not supportedGo
• Added MSS#44A:SYNC IN input pulse wider than 4usec can cause a FRC lockstep errorGo
• Added MSS#45: Bootup failure during the serial flash busy stateGo
• Added MSS#50: Occasional EDMA self-test failures Go
• Added MSS#51: Spurious toggle on nERROR OUT signal during powerup due to undefined state in ESM block.Go
• Updated ANA#11B: Updated/Revised the Title, Description and workaround rephrased. TX and RX calibrations sensitive to external interference can be avoided by saving boot time calibrations at productionGo
• Updated ANA#12A: Updated/Revised the Title. Rephrased the Description and Workaround. Problem doesn’t have to be only for CW input. Go
• Updated ANA#13B: Updated/Revised the Description. TX3/TX1 and TX3/TX2 combinations exhibit a higher phase mismatchGo
• Updated ANA#17A: Updated/Revised the Description. Added frequency of the spur. Go
• Updated ANA#18B: Updated/Revised the Title rephrased, Description and Workaround. Language added to include spur frequencies and two workarounds were addedGo
• Updated ANA#22A: Updated/Revised the Title rephrased, Description and Workaround. Language condensed to apply for all Inter-chirp Idle timeGo