2.1.2.4 Low Level Processing

As described in Figure 4, the implementation of the traffic-monitoring example in the signal-processing chain consists of the following blocks implemented as DSP code executing on the C674x core in the IWR1642:

• Range processing
  • For each antenna, 1D windowing, and 1D fast Fourier transform (FFT)
  • Range processing is interleaved with the active chirp time of the frame
• Doppler processing
  • For each antenna, 2D windowing, and 2D FFT
  • Then non-coherent combining of received power across antennas in floating-point precision
• Range-Doppler detection algorithm
  • Constant false-alarm rate, cell averaging smallest of (CASO-CFAR) detection in range domain, plus CFAR-cell averaging (CACFAR) in Doppler domain detection, run on the range-Doppler power mapping to find detection points in range and Doppler space.
• Angle estimation
  • For each detected point in range and Doppler space, reconstruct the 2D FFT output with Doppler compensation, then a beamforming algorithm returns one angle based on the angle correction for Vmax extension.

After the DSP finishes frame processing, the results consisting of [range, Doppler, angle, detection SNR] are formatted and written in shared memory (L3RAM) for R4F to perform high level processing. R4F then sends all the results to the host through a UART for visualization.