TIDUE73A April   2018  – November 2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 C2000 Real-Time MCU LaunchPad
      2. 2.2.2 SN65HVD78
      3. 2.2.3 TLV702
      4. 2.2.4 TPS22918-Q1
    3. 2.3 Design Considerations
      1. 2.3.1 BiSS-C Protocol
        1. 2.3.1.1 Line Delay Compensation
        2. 2.3.1.2 Processing Time Request by Encoder
        3. 2.3.1.3 Control Communication
      2. 2.3.2 C2000 BiSS-C Encoder Interface Overview
      3. 2.3.3 TIDM-1010 Board Implementation
      4. 2.3.4 MCU Resource Requirements
        1. 2.3.4.1 Input, Output Signals, and CLB Tiles
      5. 2.3.5 CLB BiSS-C Implementation Details
        1. 2.3.5.1 Transaction Waveforms
        2. 2.3.5.2 FRAME_STATE Generation
        3. 2.3.5.3 CLB_SPI_CLOCK Generation
        4. 2.3.5.4 ENCODER_CLOCK (MA) Generation
      6. 2.3.6 PM BiSS-C Interface Library
        1. 2.3.6.1 PM BiSS-C Library Functions
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware
      1. 3.1.1 TIDM-1010 Jumper Configuration
    2. 3.2 Software
      1. 3.2.1 C2000 Driver Library (DriverLib)
      2. 3.2.2 C2000 SysConfig
      3. 3.2.3 C2000 Configurable Logic Block Tool
      4. 3.2.4 Installing Code Composer Studio™ and C2000WARE-MOTORCONTROL-SDK
      5. 3.2.5 Locating the Reference Software
    3. 3.3 Testing and Results
      1. 3.3.1 Hardware Configuration
      2. 3.3.2 Building and Loading Project
      3. 3.3.3 Running Example Code
      4. 3.3.4 Encoder Test
      5. 3.3.5 Benchmarks
      6. 3.3.6 Troubleshooting
  10. 4Design Files
  11. 5Software Files
  12. 6Related Documentation
    1.     Trademarks
  13. 7Terminology
  14. 8About the Authors
  15. 9Revision History

3.3.5 Benchmarks

Table 3-5 lists the C28x CPU cycles required to execute BiSS-C library functions from RAM. This data was collected using the ERAD module and the following compiler settings:

  • C2000 Codegen Tools V22.6.1.LTS
  • -O2 -mf2
  • float_support: fpu32
  • tmu_support: tmu0
  • fp_mode: relaxed
  • abi: eabi
Note: These functions can be further optimized depending on the application. For example, if the resolution of the encoder is known at compile time, instead of run time, some code can be eliminated.
Table 3-5 Cycle-Count Benchmarks
Function Cycles -O2 -mf2 Notes
PM_bissc_setupSCDTransaction 369
bissc_setupCDTest 23
PM_bissc_receivePosition 552 Depends on the resolution of the encoder. An encoder with 12 multiturn and 20 single turn bits was used for this measurement.
PM_bissc_doCDTasks 39 (min), 225 (max) The maximum cycles occur when a register read or register write has completed.
PM_bissc_startOperation 39
PM_bissc_setFreq 73
bissc_getCRC 90
bissc_spiRxISR 497

Table 3-6 lists the code-size, in 16-bit words, corresponding to each of the library source files. The C28x lookup table takes 256 words of RAM or Flash that is not reflected in this table.

Table 3-6 Code-size in 16-bit Words
Source File Code Size -O2 --mf2
pm_bissc_source 910
pm_bissc_crc 49
clb_config 463