TIDUEG2C March   2019  – March 2020

 

  1.   96

Measure SFRA for Closed Voltage Loop

  1. The SFRA is integrated in the software of this build to verify that the designed compensator provides enough gain and phase margin by measuring on hardware. To run the SFRA, keep the project running, and from the SYSCFG page, click on the SFRA icon. The SFRA GUI will pop up.
  2. Select the options for the device on the SFRA GUI; for example, for F280049, select floating point. Click on setup connection. In the pop-up window, uncheck the boot-on-connect option and select an appropriate COM port. Click Ok. Return to the SFRA GUI and click Connect.
  3. The SFRA GUI will connect to the device. A SFRA sweep can now be started by clicking “Start Sweep”. The complete SFRA sweep will take a few minutes to finish. Activity can be monitored by seeing the progress bar on the SFRA GUI and also by checking the flashing of blue LED on the back of the control card, which indicates UART activity. Once complete, a graph with the open loop plot will appear, as shown in Figure 48.
  4. Figure 48. SFRA Open Loop Plot for the Closed Voltage Loop
    (Vprim 400 V, Vsec 300 V, Power 1.972 kW, with Resistive Load at the Output)
    TIDM-02002 tidm-02002-lab2-sfra-voltage-vp400-vsec300-p1972-ol.png

    The Frequency Response Data is also saved in the project folder, under an SFRA Data Folder, and is time-stamped with the time of the SFRA run.

    The data matches closely to the designed compensator, but it is reasonable to expect deviations because the measurement in open loop is susceptible to error, due to small signal injection, which can drift the DC point of the converter.

    Test the SFRA at different voltages to verify that the system is stable across the operable range.

  5. This verifies the voltage loop design.
  6. To bring the system to a safe stop, bring the input VPRIM voltage down to zero. Observe the voltages and currents on the watch window go down to zero.
  7. Fully halting the MCU when in real-time mode is a two-step process. First, halt the processor by using the Halt button on the toolbar TIDM-02002 tidm-02002-halt.png, or by using Target → Halt. Then, take the MCU out of real-time mode by clicking on TIDM-02002 tidm-02002-real-time-enable.png. Finally, reset the MCU TIDM-02002 tidm-02002-reset.png.
  8. Close the CCS debug session by clicking on Terminate Debug Session TIDM-02002 tidm-02002-terminate-all.png (Target → Terminate all).