TIDUF20B December   2022  – July 2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Configure This Design for Different Use Cases
      2. 2.2.2 Auxiliary Power Strategy
      3. 2.2.3 High-Side N-Channel MOSFET
      4. 2.2.4 Stacked AFE Communication
      5. 2.2.5 Thermistor Multiplexer
      6. 2.2.6 CAN Stacking
    3. 2.3 Highlighted Products
      1. 2.3.1  BQ76972
      2. 2.3.2  MSPM0G3519
      3. 2.3.3  UCC334xx
      4. 2.3.4  LM5168
      5. 2.3.5  ISO1640
      6. 2.3.6  ISO1042
      7. 2.3.7  ISO1410
      8. 2.3.8  TPS7A24
      9. 2.3.9  TMP61
      10. 2.3.10 TPD2E007
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software Requirements
      1. 3.2.1 Getting Started MSPM0 Software
        1. 3.2.1.1 Download and Install Software Required for Board Test
        2. 3.2.1.2 Import the Project Into CCS
        3. 3.2.1.3 Compile the Project
        4. 3.2.1.4 Download Image and Run
      2. 3.2.2 Software Function List
        1. 3.2.2.1 Driverlib Function List
          1.        CAN_ID_Init_on_Startup
          2.        CAN_Write
          3.        CANprocessCANRxMsg
          4.        I2C_WriteReg
          5.        I2C_ReadReg
          6.        RS485_Send
          7.        RS485_Receive
        2. 3.2.2.2 Application Function List
          1.        Temp_Mux_Polling
          2.        BatteryDataUpdate_32s
          3.        BQ769x2_OTP_Programming
          4.        Check_Signal_Pattern
          5.        BMU_FET_Test
      3. 3.2.3 Software Workflow
    3. 3.3 Test Setup
    4. 3.4 Test Results
      1. 3.4.1 Cell Voltage Accuracy
      2. 3.4.2 Pack Current Accuracy
      3. 3.4.3 Auxiliary Power and System Current Consumption
      4. 3.4.4 Protection
      5. 3.4.5 Working Modes Transition
      6. 3.4.6 Thermistor Multiplexer
      7. 3.4.7 ESD Performance
      8. 3.4.8 Surge Immunity
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author
  12. 6Revision History

2.2.2 Auxiliary Power Strategy

With the requests of low current consumption and good thermal performance in normal mode and ship mode, this design uses two kinds of auxiliary power strategies for high-voltage and low-voltage ESS. Figure 2-4 shows the strategy for low-voltage ESS.

TIDA-010247 Auxiliary Power Strategy for Low-Voltage ESSFigure 2-4 Auxiliary Power Strategy for Low-Voltage ESS

The low-voltage ESS power strategy has a 120V input, 0.3A, ultra-low IQ synchronous buck DC/DC converter LM5168P with a low IQ 0.3A LDO TPS7A25 as the main power source when the system is working in normal mode which requires hundreds of mA with normal CAN or RS-485 communications on the system side, giving the system better efficiency and thermal performance than LDOs only. A discrete step-down circuit is added before DC/DC because the 32s battery pack voltage can exceed 120V.

When the system experiences a serious cell undervoltage and must enter ship mode, the MCU configures both of the BQ76972 devices to enter shutdown mode through an I2C command or RST_SHUT pin and turns off the LM5168P output through the EN pin, which configures the system to very-low-current consumption mode. This design supports both charger attach and system attach wake up functions. Both methods wake up the bottom BQ76972 device and enable normal 3.3V regulator REG1, then the MCU is powered on and enables the LM5168P through the EN pin.

To cover 32s battery systems, two stacked BQ76972 devices are used to monitor cell voltage and temperature. Avoiding an imbalance between the two stacked groups is important for longer battery life. Although cell balancing is useful to balance the voltage of all the battery cells equally, the best way is to avoid too much load gap between the two groups. In this design, ISO1640, an isolated I2C interface, is used for communication between the MCU and the top BQ76972 device. A small supply current gap between VCC1 and VCC2 of the ISO1640 benefits the system.

For low-voltage ESS, this design uses a cost-optimized, basic isolated power module UCC33410 to power ISO1640 to avoid the imbalance between the two stacked groups. Figure 2-5 shows the power rail for high-voltage ESS.

TIDA-010247 Auxiliary Power Strategy for High-Voltage ESS Figure 2-5 Auxiliary Power Strategy for High-Voltage ESS

Different from low-voltage ESS, there typically is an external pre-regulator to convert the grid voltage to 24V DC voltage to power all subsystems. Also, the isolation design is more stringent than low-voltage ESS due to the safety considerations. This design considers 8mm creepage reinforced isolation design so the design can be used in up to 1500V systems with proper protective grounding.