TIDUF33 june   2023

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Current and Voltage Controller
      2. 2.2.2 High-Resolution PWM Generation
    3. 2.3 Highlighted Products
      1. 2.3.1 TMS320F280039
      2. 2.3.2 ADS131M08
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software Requirements
      1. 3.2.1 Opening the Project Inside Code Composer Studio
      2. 3.2.2 Project Structure
      3. 3.2.3 Software Flow Diagram
    3. 3.3 Test Setup
      1. 3.3.1 Hardware Setup to Tune the Current and Voltage Loops
      2. 3.3.2 Hardware Setup to Test Bidirectional Power Flow
      3. 3.3.3 Hardware Setup for Current and Voltage Calibration
    4. 3.4 Test Procedure
      1. 3.4.1 Lab Variables Definitions
      2. 3.4.2 Lab 1. Open-Loop Current Control Single Phase
        1. 3.4.2.1 Setting Software Options for Lab 1
        2. 3.4.2.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.2.3 Running the Code
      3. 3.4.3 Lab 2. Closed Loop Current Control Single Phase
        1. 3.4.3.1 Setting Software Options for Lab 2
        2. 3.4.3.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.3.3 Running the Code
        4. 3.4.3.4 Current Calibration
      4. 3.4.4 Lab 3. Closed Loop Current Control Dual Phase
        1. 3.4.4.1 Setting Software Options for Lab 3
        2. 3.4.4.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.4.3 Running the Code
      5. 3.4.5 Lab 4. Closed Loop Current and Voltage Control
        1. 3.4.5.1 Setting Software Options for Lab 4
        2. 3.4.5.2 Building and Loading the Project and Setting up Debug Environment
        3. 3.4.5.3 Running the Code
        4. 3.4.5.4 Voltage Calibration
    5. 3.5 Test Results
      1. 3.5.1 Current Loop Load Regulation Error
      2. 3.5.2 Voltage Loop Load Regulation Error
      3. 3.5.3 Voltage Transition at No Load
      4. 3.5.4 Transient Response at Start-Up
      5. 3.5.5 Bidirectional Current Switching Time
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

3.2.2 Project Structure

GUID-2D3155E0-D272-4BEE-9453-FC23BE914F79-low.png Figure 3-3 Project Structure Overview

Figure 3-3 shows the general structure of the project. Once the project is imported, the Project Explorer appears inside CCS as shown in Figure 3-4.

Note: Figure 3-4 shows the project for F28003x; however, if a different device is chosen from the powerSUITE page, the structure is similar.

Solution-specific and device-independent files that consist of the core algorithmic code are in .c/h.

Board-specific and device-specific files are in _hal.c/h. This file consists of device-specific drivers to run the solution. If the user wants to use a different modulation scheme or a different device, the user is required only to make changes to these files, besides changing the device support files in the project.

The -main.c file consists of the main framework of the project. This file consists of calls to the board and solution file that help in creating the system framework, along with the interrupt service routines (ISRs) and slow background tasks.

For this design, the solution is bt2ph.

The powerSUITE page can be opened by clicking on the main.syscfg file, listed under the Project Explorer. The powerSUITE page generates the _settings.h file. This file is the only C language based file used in the compile of the project that is generated by the powerSUITE page. The user must not modify this file manually, because the changes are overwritten by powerSUITE each time the project is saved. _user_settings.h is included by the _settings.h and can be used to keep any settings that are outside the scope of powerSUITE tools such as #defines for ADC mapping, GPIOs, and so forth.

The _cal.h file consists of gain and offset values for current and voltage measurements.

The Kit.json and solution.js files are used internally by powerSUITE, and must not be modified by the user. Any changes to these files results in the project not functioning properly.

The solution name is also used as the module name for all the variables and defines used in the solution. Hence, all variables and function calls are prepended by the BT2PH name (for example, BT2PH_userParam_V_I_ch1). This naming convention lets the user combine different solutions while avoiding naming conflicts.

GUID-20230628-SS0I-VXNG-RDTM-S60DF7BRKJQH-low.svg Figure 3-4 Project Explorer View of the BT2PH Project

The BT2PH project consists of three ISRs (ISR3, ISR4, and ISR7). ISR1, ISR2, ISR5, and ISR6 are reserved for future use.

ISR3 is used to sense the input voltage and capacitor voltage of the buck converters. ISR3 is triggered by ADCC conversion complete. ADCC is used to sense input voltage and output voltage of the converter to implement soft-start of the DC/DC.

ISR4 is triggered by the DRDY (Data Ready) Signal of the ADS131M08. The external ADC is programmed for a 15.625-kHz sample rate, which sets the ISR frequency. The ISR runs the current and voltage control loop functions.

ISR7 is triggered by SPI receive FIFO interrupt. The ISR is used to read the external ADC data from FIFO registers.

Figure 3-5 and Figure 3-6 show the time taken by ISR3, ISR4, and ISR7. The total time taken three ISRs is less than 8 µs. The ISRs take 12.5% of CPU resources for 15.625-kHz ISR frequency.

GUID-20230628-SS0I-JBKT-5K9B-1TRWTQFK0MWK-low.png Figure 3-5 ISR4 and ISR7 Execution Time Measurement
GUID-20230628-SS0I-ZLZ4-FGNJ-4RPD4HPTGX9M-low.png Figure 3-6 ISR4 and ISR3 Execution Time Measurement