TIDUFA5 December   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Small Compact Size
      2. 2.2.2 Transformerless Design
    3. 2.3 Highlighted Products
      1. 2.3.1  BQ25790 IIC Controlled, 1–4 Cell, 5A Buck-Boost Battery Charger
      2. 2.3.2  TPS3422 Low-Power, Push-Button Controllers With Configurable Delay
      3. 2.3.3  SN74LVC1G74 Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset
      4. 2.3.4  TPS259470 2.7V–23V, 5.5A, 28mΩ True Reverse Current Blocking eFuse
      5. 2.3.5  TPS54218 2.95V to 6V Input, 2A Synchronous Step-Down SWIFT Converter
      6. 2.3.6  TPS54318 2.95V to 6V Input, 3A Synchronous Step-Down SWIFT Converter
      7. 2.3.7  LM5158 2.2MHz, Wide VIN, 85V Output Boost, SEPIC, or Flyback Converter
      8. 2.3.8  TPS61178 20V Fully Integrated Sync Boost With Load Disconnect
      9. 2.3.9  LMZM23601 36V, 1A Step-Down DC-DC Power Module in 3.8mm × 3mm Package
      10. 2.3.10 TPS7A39 Dual, 150mA, Wide-VIN, Positive and Negative Low-Dropout (LDO) Voltage Regulator
      11. 2.3.11 TPS74401 3.0A, Ultra-LDO With Programmable Soft Start
      12. 2.3.12 TPS7A96 2A, Ultra-Low Noise, Ultra-high PSRR RF Voltage Regulator
      13. 2.3.13 LM3880 3-Rail Simple Power Sequencer With Fixed Time Delay
      14. 2.3.14 DAC53401 10-Bit, Voltage-Output DAC With Nonvolatile Memory
      15. 2.3.15 INA231 28V, 16-bit, I2C Output Current, Voltage, and Power Monitor With Alert in WCSP
  9. 3System Design Theory
    1. 3.1 Input Section
      1. 3.1.1 Buck-Boost Charger
      2. 3.1.2 Power On or Off
    2. 3.2 Designing SEPIC and Cuk Based High-Voltage Power Supply
      1. 3.2.1 Basic Operation Principle of SEPIC and Cuk Converters
      2. 3.2.2 Dual High-Voltage Power Supply Design Using Uncoupled Inductors With SEPIC and Cuk
        1. 3.2.2.1 Duty Cycle
        2. 3.2.2.2 Inductor Selection
        3. 3.2.2.3 Power MOSFET Verification
        4. 3.2.2.4 Output Diode Selection
        5. 3.2.2.5 Coupling Capacitor Selection
        6. 3.2.2.6 Output Capacitor Selection
        7. 3.2.2.7 Input Capacitor Selection
        8. 3.2.2.8 Programming the Output Voltage With Adjustable function
    3. 3.3 Designing the Low-Voltage Power Supply
      1. 3.3.1 Designing the TPS54218 Through WEBENCH Power Designer
      2. 3.3.2 ±5V Transmit Supply Generation
    4. 3.4 System Clock Synchronization
    5. 3.5 Power and Data Output Connector
    6. 3.6 System Current and Power Monitoring
  10. 4Hardware, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Test Setup
    3. 4.3 Test Results
      1. 4.3.1 Efficiency Test Result
      2. 4.3.2 Line Regulation Testing Result
      3. 4.3.3 Spectrum Test Result
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
        1. 5.1.3.1 High-Voltage Supply Layout
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks

System Overview

There is a growing interest in a handheld ultrasound systems to help maximize the effectiveness of point-of-care support and diagnosis for patients. Traditionally, ultrasound systems are of a cart-based type, which integrates a higher number of channels to achieve higher performance and excellent image quality.

Ultrasound analog front ends and transmitter chips have achieved over 80% reductions in power and size. These advancements allow for higher channel integration and the lowest power possible, which is a requirement for handheld portable probes since the probes are typically battery operated (1S, 2S). Higher receiver and transmitter channel count in the system gives a better image resolution. Figure 2-1 shows the image quality difference between a 16-channel, 32-channel, and 64-channel system. Because of the power and area limitation in portable ultrasound systems, most of systems in the market are able to integrate 16- or 32-channel receivers and transmitters. The high-voltage MUX is used to excite 128 transducer elements; see Figure 2-2. Some of the limitations for the existing design are a lower image quality because of only a 16-channel receiver and a lower frame rate because of higher imaging time due to a limited number of channels. This reference design proposes a design which contains a complete power design for TI’s high-performance, 128-channel TX, 64-channel RX ultrasound smart probe design. This reference design also can be used to power most ultrasound smart probes with a bit update.

TIDA-010269 Image Resolution and Quality Across Channel IntegrationFigure 2-1 Image Resolution and Quality Across Channel Integration
TIDA-010269 16-Channel SystemFigure 2-2 16-Channel System

To achieve the target area, all the power supplies are kept on another PCB which is vertically stacked to the RX + TX board through the connector. The other advantage of having power supplies on a separate PCB is that this arrangement increases isolation of switching noise from the power supply to sensitive receiver and transmitter devices. This power-supply board generates a total of eight different supplies (Including ±75V) from USB Type-C 5V with a capability of delivering a maximum of 15W peak power. Using TI's CDC series or LMK series clock buffer to generate synchronous clocks for the system is the usual practice. This approach leads to a higher power consumption and extra space on the board. In the proposed design, to reduce power and board space, the FPGA is used to provide clock to all the chips. The power supply board requires eight clock signals for synchronization. In ultrasound systems the transmitter is active only for 1% of imaging duration. For rest of the duration, the receiver device receives the echo to form the full image. On the same concept, the transmitter device is also kept active only for 1% duration which reduces the clock power further, the low-voltage differential signaling (LVDS) signals going to transmitter are programmed in tri-state mode for 99% duration. The LVDS buffer power in tri-state mode is 11mW/channel making the total power consumption of the clocking scheme 213mW. This is an improvement from a conventional clocking scheme power which is greater than 500mW.