SLLSEB1F February   2012  – October 2021 TPD1E10B06

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings—JEDEC Specification
    3. 6.3 ESD Ratings—IEC Specification
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

1 Features

  • Provides system-level ESD protection for low-voltage I/O interface
  • IEC 61000-4-2 level 4 ESD protection
    • ±30 kV contact discharge
    • ±30 kV air-gap discharge
  • IEC 61000-4-5 surge: 6 A (8/20 µs)
  • I/O capacitance 12 pF (typical)
  • RDYN 0.4 Ω (typical)
  • DC breakdown voltage ±6 V (minimum)
  • Ultralow leakage current 100 nA (maximum)
  • 10-V clamping voltage (maximum at IPP = 1 A)
  • Industrial temperature range: –40°C to 125°C
  • Small 0402 footprint
    (1 mm × 0.6 mm × 0.5 mm)
  • Industry standard SOD-523 package
    (0.8 mm × 1.2 mm)