Design Goals
Input Supply  Comparator Output Status (OUT)  Radiation 

Operating Range  26V ≤ V_{in} ≤ 30V  V_{in} < 26V or V_{in} > 30V  Total Ionizing Dose (TID)  SEL Immunity to LET 
20 V to 36 V  V_{out} = V_{pu}  V_{out} = GND  100 krad(Si)  85 MeV·cm^{2}/mg 
Design Description
This application brief shows how to implement a voltage window comparator circuit, targeted to monitor a 28V power rail, a spacecraft bus voltage commonly found in smaller aircraft. This wide singlesupply window comparator circuit utilizes a dual opencollector comparator and 3 resistors to set the window voltage. A shunt regulator, TL1431SP, is used to provide a reference voltage from the input voltage. Therefore, only a single power supply is utilized for the input portion of the circuit. The LM193AQMLSP was used for its open collector output, radiation specifications, and two channel count. Whenever the input voltage, V_{in}, is within the window of comparison (26 V to 30 V), the output of the circuit, V_{OUT}, is high. Whenever Vin is outside of the window of comparison, the V_{OUT} is pulled down to GND.
Design Notes
 Select a highvoltage comparator with an open collector output stage.
 Select a comparator with low input offset voltage
to optimize accuracy.
 Calculate values for the resistor divider so that V_{OUT} goes high whenever V_{1} crosses V_{REF} and goes low whenever V_{2} crosses V_{REF}.
 Calculate R5 such that shunt regulator is within
sink current specification for entire operating range.
Design Steps
 Select a highvoltage comparator with an
open collector output stage that can operate at the highest possible supply voltage. In
this design, the highest input/supply voltage is 36 V.
 Determine an appropriate reference level,
V_{REF}, for the window comparator. The TL1431SP internal reference voltage,
2.5 V, was used for ease of calculations. If another reference voltage were to be used
with the TL1431SP, a voltage divider would be needed between the cathode and anode of the
shunt regulator, with V_{REF} between the resistors.
 Calculate the value of R_{5}, the
resistor across V_{IN} and V_{REF}, by relating V_{REF} to the
operating voltage range. Ensure that R_{5} is at a level where the shunt regulator
is sufficiently biased for the entire operating range. The current needed to bias the
TL1431SP, I_{Bias}, has to be between 1 mA and 100 mA. A 4.7kΩ resistor was
chosen as it kept the bias current within this range for the entire voltage operating
range.
Equation 1.
${I}_{\mathrm{Bias}\left(\mathrm{Min}\right)}=\frac{{V}_{\mathrm{in}\left(\mathrm{Min}\right)}{V}_{\mathrm{Ref}}}{{R}_{5}}=\frac{20V2.5V}{4.7\mathrm{k\Omega}}=3.72\mathrm{mA}$
Equation 1.
${I}_{\mathrm{Bias}\left(\mathrm{Max}\right)}=\frac{{V}_{\mathrm{in}\left(\mathrm{Max}\right)}{V}_{\mathrm{Ref}}}{{R}_{5}}=\frac{36V2.5V}{4.7\mathrm{k\Omega}}=7.12\mathrm{mA}$
Values between 350 Ω and 16 kΩ could be used in this design.
Consideration was made to minimize the bias current, yet give some buffer from the 1 mA
minimum specification. If V_{REF} is seen to be noisy, a decoupling capacitor can
be placed between the node and GND to filter out the noise.
 The positive input to the top comparator,
V_{1}, and the negative input to the bottom comparator, V_{2}, can be
related to V_{in} through voltage division:
Equation 1.
${V}_{1}={V}_{\mathrm{in}}\left(\frac{{R}_{2}+{R}_{3}}{{R}_{1}+{R}_{2}+{R}_{3}}\right),{V}_{2}={V}_{\mathrm{in}}\left(\frac{{R}_{3}}{{R}_{1}+{R}_{2}+{R}_{3}}\right)$
The window
comparator trips when V_{1} passes V_{REF} to output high, and again
when V_{2} passes V_{REF} to output low. The comparator is low if
V_{1} is less than V_{REF}. In this design, the window comparator will
trip high when V_{in} equals 26 V and trip low when V_{in} equals 30 V;
both while V_{REF} equals 2.5 V.
Equation 1.
$2.5=26\left(\frac{{R}_{2}+{R}_{3}}{{R}_{1}+{R}_{2}+{R}_{3}}\right)\to 10.4=\frac{{R}_{1}+{R}_{2}+{R}_{3}}{{R}_{2}+{R}_{3}}$
Equation 1.
$2.5=30\left(\frac{{R}_{3}}{{R}_{1}+{R}_{2}+{R}_{3}}\right)\to 12=\frac{{R}_{1}+{R}_{2}+{R}_{3}}{{R}_{3}}$
 Solve both equations from step 4 for
(R_{1}+R_{2}+R_{3}) and substitute one equation for the
other.
Equation 1.
$10.4{R}_{2}+10.4{R}_{3}={R}_{1}+{R}_{2}+{R}_{3}$
Equation 1.
$12{R}_{3}={R}_{1}+{R}_{2}+{R}_{3}$
Equation 1.
$12{R}_{3}=10.4{R}_{2}+10.4{R}_{3}$
Equation 1.
$10.4{R}_{2}=1.6{R}_{3}\to 6.5{R}_{2}={R}_{3}$
 Using the relationship obtained in step 5,
solve for a relationship between R_{1} and R_{2}.
Equation 1.
$12(6.5{R}_{2})={R}_{1}+{R}_{2}+6.5{R}_{2}$
Equation 1.
$78{R}_{2}={R}_{1}+7.5{R}_{2}\to 70.5{R}_{2}={R}_{1}$
 Using the equations derived in steps 5 and
6, size resistors R_{1}, R_{2}, and R_{3} accordingly. For this
design, R_{2} was set to be 2.55 kΩ, which meant R_{1} and R_{3}
would be 179.775 kΩ and 16.575 kΩ, respectively. The magnitude of these resistors were
chosen based off of the current consumption across the voltage divider (around 100 to 180
μA across the operating condition).
 Select a 5% tolerant resistor to act as the
pullup resistor, R_{4}, from the output of the window comparator to
V_{PU}. Size this component large enough to ensure the current sinked by the
comparator is not large, but small enough that the leakage current drawn by the comparator
output when high is not causing too large of a voltage drop.
 The values obtained in step 7 were adjusted
for 1% resistor tolerances to be 178 kΩ, 2.55 kΩ, and 16.5 kΩ for R_{1},
R_{2}, and R_{3}, respectively. Due to these changes, the window of
comparison was shifted to trip earlier for overvoltage conditions and later for
undervoltage conditions. In the DC Simulation Results, the window of comparison is between 25.8595 V
and 29.856 V.
Design Simulations
DC Simulation Results
Transient Simulation Results
References:
 SPICE Simulation File: http://www.ti.com/lit/zip/snom708.
Design Featured Comparator
LM193QMLSP 

V_{S}  2 V to 36 V 
V_{inCM}  0 V to 34.5 V 
V_{OUT}  OpenCollector 
V_{OS}  5 mV 
I_{Q}  200 μA/channel 
t_{PD(HL)}  2.50 μs 
TID Radiation Lot Acceptance Test (RLAT) / RHA  100 krad(Si) 
TID Characterization (ELDRSFree)  100 krad(Si) 
SEL Immune to LET  SEL Immune (Bipolar process) 
http://www.ti.com/product/LM193QMLSP 
Design Featured Shunt Reference
TL1431SP 

V_{KA}  2.5 V to 36 V 
I_{KA}  1 mA to 100 mA 
V_{I(ref)}  2.5 V 
Initial Accuracy  0.4% 
TID  100 krad(Si) 
SEL Immune to LET  SEL Immune (Bipolar process) 
www.ti.com/product/TL1431SP 
Design Alternate Comparator

TLV1704SEP

LM139AQMLSP

V_{S} 
2.2 V to 36 V 
2 V
to 36 V 
V_{inCM} 
Railtorail 
0 V to 34 V

V_{OUT} 
OpenCollector, Railtorail

OpenCollector 
V_{OS} 
500 µV 
2 mV

I_{Q} 
55 µA/channel 
200 μA/channel

t_{PD(HL)} 
460 ns 
2.50 μs 
TID Characterization
(ELDRSFree)

30 krad(Si) 
100 krad(Si)

TID Radiation Lot Acceptance
Test (RLAT) / RHA 
20 krad(Si) 
100 krad(Si)

SEL Immune to LET 
43 MeV·cm^{2}/mg 
SEL
Immune (Bipolar process) 

https://www.ti.com/product/TLV1704SEP 
https://www.ti.com/product/LM139AQMLSP
