SCES598E JULY   2004  – March 2016 SN74AVCH1T45

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Switching Characteristics, VCCA= 1.2 V
    7. 7.7  Switching Characteristics, VCCA= 1.5 V ± 0.1 V
    8. 7.8  Switching Characteristics, VCCA= 1.8 V ± 0.15 V
    9. 7.9  Switching Characteristics, VCCA= 2.5 V ± 0.2 V
    10. 7.10 Switching Characteristics, VCCA= 3.3 V ± 0.3 V
    11. 7.11 Operating Characteristics
    12. 7.12 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Fully Configurable Dual-Rail Design
      2. 9.3.2 Supports High-Speed Translation
      3. 9.3.3 Partial-Power-Down Mode Operation
      4. 9.3.4 Active Bus-Hold Circuitry
      5. 9.3.5 VCC Isolation
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Unidirectional Logic Level-Shifting Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Bidirectional Logic Level-Shifting Application
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
          1. 10.2.2.2.1 Enable Times
        3. 10.2.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Available in the Texas Instruments NanoStar™ and NanoFree™ Packages
  • Control Inputs (DIR) VIH and VIL Levels Are Referenced to VCCA Voltage
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup and Pulldown Resistors
  • VCC Isolation
  • Fully Configurable Dual-Rail Design
  • I/Os Are 4.6-V Tolerant
  • Ioff Supports Partial-Power-Down Mode Operation
  • Typical Max Data Rates
    • 500 Mbps (1.8-V to 3.3-V Translation)
    • 320 Mbps (<1.8-V to 3.3-V Translation)
    • 320 Mbps (Translate to 2.5 V or 1.8 V)
    • 280 Mbps (Translate to 1.5 V)
    • 240 Mbps (Translate to 1.2 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • Human-Body Model (A114-A): 2000 V
    • Machine Model (A115-A): 200 V
    • Charged-Device Model (C101): 1000 V

2 Applications

  • Personal Electronics
  • Industrial
  • Enterprise
  • Telecommunications

3 Description

The SN74AVCH1T45 is a single-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The A port is designed to track VCCA, which accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCH1T45 is designed for asynchronous communication between two data buses. The device transmits data from either the A bus to the B bus, or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input.

The SN74AVCH1T45 is designed so that the DIR input is referenced to VCCA.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74AVCH1T45 SC70 (6) 2.00 mm × 1.25 mm
SOT-23 (6) 2.90 mm × 1.60 mm
DSBGA (6) 1.50 mm × 0.90 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram (Positive Logic)

SN74AVCH1T45 ld_ces598.gif