SLAS623A November   2008  – November 2016 TAS5342A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Audio Specifications (BTL)
    7. 6.7 Audio Specifications (Single-Ended Output)
    8. 6.8 Audio Specifications (PBTL)
    9. 6.9 Typical Characteristics
      1. 6.9.1 BTL Configuration
      2. 6.9.2 SE Configuration
      3. 6.9.3 PBTL Configuration
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Mid Z Sequence Compatibility
      2. 7.3.2 Device Protection System
      3. 7.3.3 Use Of TAS5342A In High-Modulation-Index Capable Systems
      4. 7.3.4 Overcurrent (OC) Protection With Current Limiting and Overload Detection
      5. 7.3.5 Pin-To-Pin Short Circuit Protection System (PPSC)
      6. 7.3.6 Overtemperature Protection
      7. 7.3.7 Undervoltage Protection (UVP) and Power-On Reset (POR)
      8. 7.3.8 Error Reporting
      9. 7.3.9 Device Reset
    4. 7.4 Device Functional Modes
      1. 7.4.1 Protection Mode Selection Pins
      2. 7.4.2 System Power-Up/Power-Down Sequence
        1. 7.4.2.1 Powering Up
        2. 7.4.2.2 Powering Down
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Differential (2N) BTL Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 PCB Material Recommendation
          2. 8.2.1.2.2 PVDD Capacitor Recommendation
          3. 8.2.1.2.3 Decoupling Capacitor Recommendations
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Non-Differential (1N) BTL
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Application Curves
      3. 8.2.3 Typical SE Application
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Application Curves
      4. 8.2.4 Typical Differential (2N) PBTL Application
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Application Curves
      5. 8.2.5 Typical Non-Differential (1N) PBTL
        1. 8.2.5.1 Design Requirements
        2. 8.2.5.2 Application Curves
    3. 8.3 Systems Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Total Power Output (Bridge Tied Load)
    • 2 × 100 W at 10% THD+N Into 4 Ω
    • 2 × 80 W at 10% THD+N Into 6 Ω
    • 2 × 65 W at 10% THD+N Into 8 Ω
  • Total Power Output (Single Ended)
    • 4 × 40 W at 10% THD+N Into 3 Ω
    • 4 × 30 W at 10% THD+N Into 4 Ω
  • Total Power Output (Parallel Mode)
    • 1 × 200 W at 10% THD+N Into 2 Ω
    • 1 × 160 W at 10% THD+N Into 3 Ω
  • >110 dB SNR (A-Weighted With TAS5518 Modulator)
  • <0.1% THD+N (1 W, 1 kHz)
  • Supports PWM Frame Rates of 192 kHz to
    432 kHz
  • Resistor-Programmable Current Limit
  • Integrated Self-Protection Circuitry, Including:
    • Under Voltage Protection
    • Overtemperature Warning and Error
    • Overload Protection
    • Short-Circuit Protection
    • PWM Activity Detector
  • Standalone Protection Recovery
  • Power-On Reset (POR) to Eliminate System Power-Supply Sequencing
  • High-Efficiency Power Stage (>90%) With 80-mΩ Output MOSFETs
  • Thermally Enhanced Package 44-Pin HTSSOP (DDV)
  • Error Reporting, 3.3-V and 5-V Compliant
  • EMI Compliant When Used With Recommended System Design

2 Applications

  • Mini/Micro Audio System
  • DVD Receiver
  • Home Theater

3 Description

The TAS5342A is a high-performance, integrated stereo digital amplifier power stage designed to drive a 4-Ω bridge-tied load (BTL) at up to 100 W per channel with low-harmonic distortion, low-integrated noise, and low-idle current.

The TAS5342A has a complete protection system integrated on-chip, safeguarding the device against a wide range of fault conditions that could damage the system. These protection features are short-circuit protection, over-current protection, under voltage protection, over temperature protection, and a loss of PWM signal (PWM activity detector).

A power-on-reset (POR) circuit is used to eliminate power-supply sequencing that is required for most power-stage designs.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TAS5342A HTSSOP (44) 14.00 mm × 6.10 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

BTL Output Power vs Supply Voltage

TAS5342A gr2_fp_las557_jh_fp.gif

4 Revision History

Changes from * Revision (November 2008) to A Revision

  • Added Pin Configuration and Functions, Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Deleted the Ordering Information table; see the POA at the end of the datasheet. Go
  • Added the Thermal Information tableGo