SNVSCN3A
April 2025 – May 2026
TPS371K-Q1
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Requirements
6.7
Timing Requirements
6.8
Timing Diagrams
6.9
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Input Voltage (VDD)
7.3.1.1
Undervoltage Lockout (VPOR < VDD < UVLO)
7.3.1.2
Power-On Reset (VDD < VPOR )
7.3.2
SENSE
7.3.2.1
SENSE Hysteresis
7.3.3
Adjustable Voltage Thresholds
7.3.4
Release Time Delay
7.3.4.1
Capacitor Adjustable Release Time Delay Configuration
7.3.5
Sense Time Delay
7.3.5.1
Sense Time Delay Configuration
7.3.6
Built-In Self-Test (BIST)
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design 1: DC-Link Monitoring
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Setting Voltage Threshold
8.2.1.2.2
Meeting the Sense and Reset Delay
8.2.1.2.3
Setting Supply Voltage
8.2.1.3
Application Curves
8.3
Power Supply Recommendations
8.3.1
Power Dissipation and Device Operation
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Nomenclature
9.2
Documentation Support
9.2.1
Related Documentation
9.3
Receiving Notification of Documentation Updates
9.4
Support Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DFX|15
MPSS195
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvscn3a_oa
Data Sheet
TPS371K
-Q1
Automotive 1500V Window (OV and UV) Supervisor with Integrated Buffer for 400V and 800V DC-Link Voltage Measurements