SLVSCQ5A December   2014  – February 2015 TPS62184

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable / Shutdown (EN)
      2. 8.3.2 Soft Start / Tracking (SS/TR)
      3. 8.3.3 Power Good (PG)
      4. 8.3.4 Undervoltage Lockout (UVLO)
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode (PSM) Operation
      3. 8.4.3 Minimum Duty Cycle and 100% Mode Operation
      4. 8.4.4 Automatic Efficiency Enhancement (AEE)
      5. 8.4.5 Phase-Shifted Operation
      6. 8.4.6 Current Limit, Current Balancing, and Short Circuit Protection
      7. 8.4.7 Tracking
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical TPS62184 Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Programming the Output Voltage
          2. 9.2.1.2.2 Output Filter Selection
          3. 9.2.1.2.3 Inductor Selection
          4. 9.2.1.2.4 Output Capacitor Selection
          5. 9.2.1.2.5 Input Capacitor Selection
          6. 9.2.1.2.6 Soft Start Capacitor Selection
          7. 9.2.1.2.7 Using the Accurate EN Threshold
        3. 9.2.1.3 Application Performance Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB layout
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Dual Phase Balanced Peak Current Mode
  • Input Voltage Range: 4 V to 17 V
  • Output Voltage:
    • 0.9 V ≤ VOUT ≤ 1.8 V (6A),
    • 1.8 V ≤ VOUT ≤ 2.5 V (5.5A)
    • 2.5 V ≤ VOUT ≤ 3.5 V (5A)
  • Typical Quiescent Current of 28 µA
  • Output Voltage Accuracy of ±1% (PWM Mode)
  • Automatic Efficiency Enhancement (AEE™)
  • Phase Shifted Operation
  • Automatic Power Save Mode
  • Adjustable Soft Start
  • Power Good Output
  • Undervoltage Lockout
  • HICCUP Over Current Protection
  • Over Temperature Protection
  • Pin to Pin Compatible with TPS62180/2
  • NanoFree™ 2.10 mm x 3.10 mm DSBGA Package

2 Applications

  • Low Profile POL Supply
  • NVDC Powered Systems
  • Dual/Triple Cell Li-ion Battery
  • Ultra Portable/Embedded/Tablet PC
  • Computing Network Solutions
  • Micro Server, SSD

3 Description

The TPS62184 is a synchronous dual-phase step-down DC-DC converter for low profile power rails. It operates with two identical, current balanced phases that are peak current controlled enabling use in height limited applications.

With a wide operating input voltage range of 4 V to 17 V, the device is ideally suited for systems powered from multi-cell Li-Ion batteries or 12-V rails. The output current of 6 A is continuously provided by two phases of 3 A each, allowing the use of low profile external components. The phases operate out of phase, reducing switching noise significantly.

The TPS62184 automatically enters Power Save Mode to maintain high efficiency down to very light loads. It also incorporates an Automatic Efficiency Enhancement (AEETM) for the entire duty cycle range.

The device features a Power Good signal, as well as an adjustable soft start. The quiescent current is typically 28 µA, it is able to run in 100% mode, and it has no duty cycle limitation even at lowest output voltage.

The TPS62184 is packaged in a small 24-bump, 0.5 mm pitch DSBGA package.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS62184 DSBGA (24) 2.10 mm x 3.10 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

4 Simplified Schematic

TPS62184 SLVSCQ5_typapp.gif

Efficiency vs Output Current

TPS62184 SLVSBB8_efficiency_lin.gif