SCES930B April   2021  – March 2022 TXU0104-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Related Products
  6. 6 Pin Configuration and Functions—TXU0104-Q1
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Switching Characteristics: Tsk, TMAX
    7. 7.7  Switching Characteristics, VCCA = 1.2 ± 0.1 V
    8. 7.8  Switching Characteristics, VCCA = 1.5 ± 0.1 V
    9. 7.9  Switching Characteristics, VCCA = 1.8 ± 0.15 V
    10. 7.10 Switching Characteristics, VCCA = 2.5 ± 0.2 V
    11. 7.11 Switching Characteristics, VCCA = 3.3 ± 0.3 V
    12. 7.12 Switching Characteristics, VCCA = 5.0 ± 0.5 V
    13. 7.13 Operating Characteristics
    14. 7.14 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Load Circuit and Voltage Waveforms
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  CMOS Schmitt-Trigger Inputs with Integrated Pulldowns
        1. 9.3.1.1 Inputs with Integrated Static Pull-Down Resistors
      2. 9.3.2  Control Logic (OE) with VCC(MIN) Circuitry
      3. 9.3.3  Balanced High-Drive CMOS Push-Pull Outputs
      4. 9.3.4  Partial Power Down (Ioff)
      5. 9.3.5  VCC Isolation and VCC Disconnect
      6. 9.3.6  Over-Voltage Tolerant Inputs
      7. 9.3.7  Glitch-Free Power Supply Sequencing
      8. 9.3.8  Negative Clamping Diodes
      9. 9.3.9  Fully Configurable Dual-Rail Design
      10. 9.3.10 Supports High-Speed Translation
      11. 9.3.11 Wettable Flanks
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Regulatory Requirements
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • AEC-Q100 qualified for automotive applications
  • Available in wettable flank QFN (WBQA) package
  • Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
  • Up to 200 Mbps support for 3.3 V to 5.0 V
  • Schmitt-trigger inputs allows for slow and noisy inputs
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • High drive strength (up to 12 mA at 5 V)
  • Low power consumption
    • 3 µA maximum (25°C)
    • 6 µA maximum (–40°C to 125°C)
  • VCC isolation and VCC disconnect (Ioff-float) feature
    • If either VCC input is <100 mV or disconnected, all outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
  • Pinout compatible with TXB family level shifters
  • Available in other variants that support common applications: TXU0204-Q1, TXU0304-Q1
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2500-V human-body model
    • 1500-V charged-device model