SLUSBZ8B June   2014  – February 2017 UCD3138128 , UCD3138A64


  1. Features
  2. Applications
  3. Revision History
  4. Description
  5. Product Family Comparison
  6. Product Feature Overview
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  Handling Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Electrical Characteristics
    6. 8.6  Timing Characteristics
    7. 8.7  PMBUS/SMBUS/IC Timing2
    8. 8.8  Timing Requirements
    9. 8.9  Power On Reset (POR) / Brown Out Detect (BOD)
    10. 8.10 Typical Clock Gating Power Savings
    11. 8.11 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
      1. 9.1.1 ARM Processor
      2. 9.1.2 Memory
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  System Module
        1. Address Decoder (DEC)
        2. Memory Management Controller (MMC)
        3. System Management (SYS)
        4. Central Interrupt Module (CIM)
      2. 9.3.2  Peripherals
        1. Digital Power Peripherals
          1. Front End
          2. DPWM Module
          3. DPWM Events
          4. High Resolution DPWM
          5. Over Sampling
          6. DPWM Interrupt Generation
          7. DPWM Interrupt Scaling/Range
      3. 9.3.3  Automatic Mode Switching
        1. Phase Shifted Full Bridge Example
        2. LLC Example
        3. Mechanism For Automatic Mode Switching
      4. 9.3.4  DPWMC, Edge Generation, Intramux
      5. 9.3.5  Filter
        1. Loop Multiplexer
        2. Fault Multiplexer
      6. 9.3.6  Communication Ports
        1. SCI (UART) Serial Communication Interface
        2. PMBUS/I2C
        3. SPI
      7. 9.3.7  Real Time Clock
      8. 9.3.8  Timers
        1. 24-Bit Timer
        2. 16-Bit PWM Timers
        3. Watchdog Timer
      9. 9.3.9  General Purpose ADC12
      10. 9.3.10 Miscellaneous Analog
      11. 9.3.11 Brownout
      12. 9.3.12 Global I/O
      13. 9.3.13 Temperature Sensor Control
      14. 9.3.14 I/O Mux Control
      15. 9.3.15 Current Sharing Control
      16. 9.3.16 Temperature Reference
    4. 9.4 Device Functional Modes
      1. 9.4.1 DPWM Modes Of Operation
        1. Normal Mode
        2. Phase Shifting
        3. DPWM Multiple Output Mode
        4. DPWM Resonant Mode
      2. 9.4.2 Triangular Mode
      3. 9.4.3 Leading Edge Mode
    5. 9.5 Register Maps
      1. 9.5.1 CPU Memory Map And Interrupts
        1. Memory Map (After Reset Operation)
        2. Memory Map (Normal Operation)
        3. Memory Map (System And Peripherals Blocks)
      2. 9.5.2 Boot ROM
      3. 9.5.3 Customer Boot Program
      4. 9.5.4 Flash Management
    6. 9.6 Synchronous Rectifier MOSFET Ramp And IDE Calculation
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. PCMC (Peak Current Mode Control) PSFB (Phase Shifted Full Bridge) Hardware Configuration Overview
        2. DPWM Initialization for PSFB
        3. DPWM Synchronization
        4. Fixed Signals to Bridge
        5. Dynamic Signals to Bridge
      3. 10.2.3 System Initialization for PCM
        1. Use of Front Ends and Filters in PSFB
        2. Peak Current Detection
        3. Peak Current Mode (PCM)
      4. 10.2.4 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Device Grounding and Layout Guidelines
    2. 12.2 Layout Examples
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Links
      2. 13.2.2 Related Documentation
        1. References
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information


  • 64 kB and 128 kB Program Flash Derivative of UCD3138 Family
    • 2-32 kB or 4-32 kB Program Flash Memory Banks
    • Supports Execution From 1 Bank, While Programming Another
    • Capability to Update Firmware Without Shutting Down the Power Supply
    • Additional Communication Ports Compared to the UCD3138 (+1 SPI, +1 I2C)
    • Boot Flash Based Dual Memory Image Support for ‘On the Fly’ Firmware Updates
  • Digital Control of up to 3 Independent Feedback Loops
    • Dedicated PID Based Hardware
    • 2-pole/2-zero Configurable, Non-Linear Control
  • Up to 16 MSPS Error A/D Converter (EADC)
    • Configurable Resolution (min: 1mV/LSB)
    • Up to 8x Oversampling and Adaptive Sample Positioning
    • Hardware Based Averaging (up to 8x)
    • 14 bit Effective Reference DAC
  • Up to 8 High Resolution Digital Pulse Width Modulated (DPWM) Outputs
    • 250 ps Pulse Width Resolution
    • 4 ns Frequency and Phase Resolution
    • Adjustable Phase Shift and Dead-bands
    • Cycle-by-Cycle Duty Cycle Matching
    • Up to 2 MHz Switching Frequency
  • Configurable Trailing/Leading/Triangular Modulation
  • RTC support
  • Configurable Feedback Control
    • Voltage, Average Current and Peak Current Mode Control
    • Constant Current, Constant Power
  • Configurable FM, Phase Shift Modulation and PWM
  • Fast, Automatic and Smooth Mode Switching
    • Frequency Modulation and PWM
    • Phase Shift Modulation and PWM
  • High Efficiency and Light Load Management
    • Burst Mode & Ideal Diode Emulation
    • Synchronous Rectifier Soft On/Off
    • Low IC Standby Power
  • Primary Side Voltage Sensing
  • Current Share (Average & Master/Slave)
  • Feature Rich Fault Protection Options
    • 7 Analog / 4 Digital Comparators,
    • Cycle-by-Cycle Current Limiting
    • Programmable Blanking Time and Fault Counting
    • External Fault Inputs
  • Synchronization of DPWM Waveforms Between Multiple UCD3138x Devices
  • 15 channel, 12 bit, 267 ksps General Purpose ADC
  • Internal Temperature Sensor
  • Fully Programmable High-Performance 31.25 MHz, 32-bit ARM7TDMI-S Processor
    • 64 kB Program Flash (2-32 kB Banks)
    • 2 kB Data Flash with ECC
    • 8 kB Data RAM
    • 4 kB Boot ROM Enables Firmware Boot-Load
  • Communication Peripherals,
    • 2 - I2C/PMBus interfaces
    • 2 - UARTs, 1 - SPI
  • Timer Capture with Selectable Input Pins
  • 80-pin QFP Package
  • Operating Temperature: –40°C to 125°C


  • Power Supplies and Telecom Rectifiers
  • Power Factor Correction
  • Isolated DC-DC Modules
  • Phase Shifted Full Bridge with Peak Current Mode Control, LLC, HSFB, Forward, etc.

Typical Applications and Tools

UCD3138128 UCD3138A64 fp_lusbz8.gif

Revision History

Changes from A Revision (June 2014) to B Revision

  • Changed Device Grounding and Layout Guidelines. Go

Changes from * Revision (June 2014) to A Revision

  • Added device UCD313128 Go
  • Changed Feature From: "64 kB Program Flash Derivative." To: "64 kB and 128 kB Program Flash Derivative..."Go
  • Changed Feature From: 2-32 kB Program Flash Memory Banks To: 2-32 kB or 4-32 kB Program Flash Memory BanksGo
  • Added Feature: "Boot Flash Based Dual Memory..."Go
  • Changed Feature From: 4 kB Data RAM To: 8 kB Data RAM Go
  • Changed Feature From: "8 kB Boot ROM Enables..." To: "4 kB Boot ROM Enables..."Go
  • Changed From: UCD3138A64 to UCD3138x throughout the documentGo
  • Changed the Product Family Comparison tableGo
  • Changed title From: POWER ON RESET AND BROWN OUT (V33D pin, See Figure 3) To: POWER ON RESET AND BROWN OUT (V33A pin, See Figure 3)Go
  • Changed title From: POWER ON RESET AND BROWN OUT (V33A pin, See Figure 3) To: POWER ON RESET AND BROWN OUT (V33A pin, See Figure 3)Go
  • Changed From: V33D To: V33A in the definitions list following Figure 3 Go
  • Changed paragraph 2 of the Memory section From: 2048x32-bit Boot ROM To: 1024x32-bit Boot ROM Go
  • Changed text in the Memory section description From: The availability of 64 kB of program Flash memory in 2-32 kB banks, enables the designers to implement dual images To: The availability of 64 kB or 128 kB of program Flash memory in 2-32 kB or 4-32 kB banks, enables the designers to implement multiple imagesGo
  • Added a 2 new paragraphs to the end of the Memory section description.Go
  • Changed the Memory Map (After Reset Operation) to include Program Flash 2 and Program Flash 3 Go
  • Changed the Memory Map (Normal Operation) to include Program Flash 2 and Program Flash 3 Go
  • Added Figure 36 Go


The UCD3138 family is a digital power supply controller from Texas Instruments offering superior levels of integration and performance in a single chip solution. The UCD3138x, in comparison to Texas Instruments UCD3138x digital power controller offers 64 kB of program Flash memory in UCD3138A64 (128 KB in UCD3138128) and additional options for communication such as SPI and a second I2C port. The availability of program Flash memory in multiple 32 kB banks enables designers to implement dual images of firmware (e.g. one main image + one back-up image) in the device and provides the option to execute from either of the banks using appropriate algorithms. It also creates the unique opportunity for the processor to load a new program and subsequently execute that program without interrupting power delivery. This feature allows the end user to add new features to the power supply in the field while eliminating any down-time required to load the new program.

The flexible nature of the UCD3138 family makes it suitable for a wide variety of power conversion applications. In addition, multiple peripherals inside the device have been specifically optimized to enhance the performance of AC/DC and isolated DC/DC applications and reduce the solution component count in the IT and network infrastructure space. The UCD3138 family is a fully programmable solution offering customers complete control of their application, along with ample ability to differentiate their solution. At the same time, TI is committed to simplifying our customer’s development effort through offering best in class development tools, including application firmware, Code Composer StudioTM software development environment, and TI’s Fusion Power Development GUI which enables customers to configure and monitor key system parameters.

At the core of the controller are the Digital Power Peripherals (DPP). Each DPP implements a high speed digital control loop consisting of a dedicated Error Analog to Digital Converter (EADC), a PID based 2 pole - 2 zero digital compensator and DPWM outputs with 250ps pulse width resolution. The device also contains a 12-bit, 267 ksps general purpose ADC with up to 15 channels, timers, interrupt control, PMBus, I2C, SPI and UART communications ports. The device is based on a 32-bit ARM7TDMI-S RISC microcontroller that performs real-time monitoring, configures peripherals and manages communications. The ARM microcontroller executes its program out of programmable flash memory as well as on chip RAM and ROM.

In addition to the DPP, specific power management peripherals have been added to enable high efficiency across the entire operating range, high integration for increased power density, reliability, and lowest overall system cost and high flexibility with support for the widest number of control schemes and topologies. Such peripherals include: light load burst mode, synchronous rectification, LLC and phase shifted full bridge mode switching, input voltage feed forward, copper trace current sense, ideal diode emulation, constant current constant power control, synchronous rectification soft on and off, peak current mode control, flux balancing, secondary side input voltage sensing, high resolution current sharing, hardware configurable soft start with pre bias, as well as several other features. Topology support has been optimized for voltage mode and peak current mode controlled phase shifted full bridge, single and dual phase PFC, bridgeless PFC, hard switched full bridge and half bridge, active clamp forward converter, two switch forward converter and LLC half bridge and full bridge.

Device Information(1)

UCD3138128 TQFP (80) 12.00 mm × 12.00 mm
For detailed ordering information please check the Mechanical, Packaging, and Orderable Information section at the end of this datasheet.