- Main Page
- Data Structures
- Files

- File List
- Globals

# TI_USCI_SPI_Regs.h

Go to the documentation of this file.

    00001 //******************************************************************************
    00002 //THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR
    00003 //REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY,
    00004 //INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
    00005 //FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR
    00006 //COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE.
    00007 //TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET
    00008 //POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY
    00009 //INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR
    00010 //YOUR USE OF THE PROGRAM.
    00011 //
    00012 //IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL,
    00013 //CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY
    00014 //THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED
    00015 //OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT
    00016 //OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM.
    00017 //EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF
    00018 //REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS
    00019 //OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF
    00020 //USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S
    00021 //AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF
    00022 //YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS
    00023 //(U.S.$500).
    00024 //
    00025 //Unless otherwise stated, the Program written and copyrighted
    00026 //by Texas Instruments is distributed as "freeware".  You may,
    00027 //only under TI's copyright in the Program, use and modify the
    00028 //Program without any charge or restriction.  You may
    00029 //distribute to third parties, provided that you transfer a
    00030 //copy of this license to the third party and the third party
    00031 //agrees to these terms by its first use of the Program. You
    00032 //must reproduce the copyright notice and any other legend of
    00033 //ownership on each copy or partial copy, of the Program.
    00034 //
    00035 //You acknowledge and agree that the Program contains
    00036 //copyrighted material, trade secrets and other TI proprietary
    00037 //information and is protected by copyright laws,
    00038 //international copyright treaties, and trade secret laws, as
    00039 //well as other intellectual property laws.  To protect TI's
    00040 //rights in the Program, you agree not to decompile, reverse
    00041 //engineer, disassemble or otherwise translate any object code
    00042 //versions of the Program to a human-readable form.  You agree
    00043 //that in no event will you alter, remove or destroy any
    00044 //copyright notice included in the Program.  TI reserves all
    00045 //rights not specifically granted under this license. Except
    00046 //as specifically provided herein, nothing in this agreement
    00047 //shall be construed as conferring by implication, estoppel,
    00048 //or otherwise, upon you, any license or other right under any
    00049 //TI patents, copyrights or trade secrets.
    00050 //
    00051 //
    00052 //You may not use the Program in non-TI devices.
    00053 //
    00054 //
    00055 //This software has been submitted to export control regulations
    00056 //The ECCN is EAR99
    00057 //****************************************************************************//
    00070 #ifndef TI_USCI_SPI_Regs
    00071 #define TI_USCI_SPI_Regs
    00072
    00073 //SPI module definitions
    00074 #define USCI_AB_MODULE   0     //USCI Module 0 will be used
    00075
    00076 #define IO_SPI_CS   BIT7  //P2.7
    00077 #define IO_SPI_SDI  BIT0  //P3.0
    00078 #define IO_SPI_SDO  BIT1  //P3.1
    00079 #define IO_SPI_SCLK BIT2  //P3.2
    00080
    00081 //SPI port definitions
    00082 #define STE_PxIN    P2IN
    00083 #define STE_PxOUT   P2OUT
    00084 #define STE_PxDIR   P2DIR
    00085 #define STE_PxSEL   P2SEL
    00086 #define STE_PxREN   P2REN
    00087
    00088 #define SIMO_PxIN   P3IN
    00089 #define SIMO_PxOUT  P3OUT
    00090 #define SIMO_PxDIR  P3DIR
    00091 #define SIMO_PxSEL  P3SEL
    00092 #define SIMO_PxREN  P3REN
    00093
    00094 #define SOMI_PxIN   P3IN
    00095 #define SOMI_PxOUT  P3OUT
    00096 #define SOMI_PxDIR  P3DIR
    00097 #define SOMI_PxSEL  P3SEL
    00098 #define SOMI_PxREN  P3REN
    00099
    00100 #define CLK_PxIN    P3IN
    00101 #define CLK_PxOUT   P3OUT
    00102 #define CLK_PxDIR   P3DIR
    00103 #define CLK_PxSEL   P3SEL
    00104 #define CLK_PxREN   P3REN
    00105
    00106 #if (USCI_AB_MODULE == 0)
    00107      #ifdef   __MSP430_HAS_USCI_A0__
    00108       #define UCAxCTL0             UCA0CTL0             //* USCI Control Register 0 */
    00109       #define UCAxCTL1           UCA0CTL1               //* USCI Control Register 1 */
    00110                   #define UCAxBR0        UCA0BR0    //* USCI Baud Rate 0 */
    00111                   #define UCAxBR1        UCA0BR1          //* USCI Baud Rate 1 */
    00112                   #define UCAxMCTL         UCA0MCTL       //* USCI modulation control register*/
    00113                   #define UCAxSTAT       UCA0STAT               //* USCI Status Register */
    00114                   #define UCAxRXBUF      UCA0RXBUF      //* USCI Receive Buffer */
    00115                   #define UCAxTXBUF      UCA0TXBUF      //* USCI Transmit Buffer */
    00116                   #define UCAxICTL                       UCA0ICTL               //Interrupt control register
    00117                   #define UCAxIE                                 UCA0IE                 //Interrupt Enable Register
    00118                   #define UCAxIFG                                UCA0IFG                //Interrupt Flag register
    00119                   #define UCAxIV                                 UCA0IV                 //interrupt Vector register
    00120                   #define UCAxRXIE       BIT0
    00121                   #define UCAxTXIE       BIT1
    00122                   #define UCAxRXIFG      BIT0
    00123                   #define UCAxTXIFG      BIT1
    00124      #endif
    00125      #ifdef   __MSP430_HAS_USCI_B0__
    00126                         #define UCBxCTL0                   UCB0CTL0             //* USCI Control Register 0 */
    00127                         #define UCBxCTL1         UCB0CTL1               //* USCI Control Register 1 */
    00128                         #define UCBxBR0          UCB0BR0                //* USCI Baud Rate 0 */
    00129                         #define UCBxBR1          UCB0BR1                //* USCI Baud Rate 1 */
    00130                         #define UCBxMCTL           UCB0MCTL             //* USCI modulation control register*/
    00131                         #define UCBxSTAT         UCB0STAT               //* USCI Status Register */
    00132                         #define UCBxRXBUF        UCB0RXBUF  //* USCI Receive Buffer */
    00133                         #define UCBxTXBUF        UCB0TXBUF  //* USCI Transmit Buffer */
    00134                         #define UCBxICTL                         UCB0ICTL               //Interrupt control register
    00135                         #define UCBxIE                           UCB0IE                 //Interrupt Enable Register
    00136                         #define UCBxIFG                          UCB0IFG                //Interrupt Flag register
    00137                         #define UCBxIV                           UCB0IV                 //interrupt Vector register
    00138                         #define UCBxRXIE       BIT0
    00139                         #define UCBxTXIE       BIT1
    00140                         #define UCBxRXIFG      BIT0
    00141                         #define UCBxTXIFG      BIT1
    00142            #endif
    00143 #endif
    00144
    00145 #if (USCI_AB_MODULE == 1)
    00146     #ifdef   __MSP430_HAS_USCI_A1__
    00147                         #define UCAxCTL0                   UCA1CTL0             //* USCI Control Register 0 */
    00148                         #define UCAxCTL1         UCA1CTL1               //* USCI Control Register 1 */
    00149                         #define UCAxBR0          UCA1BR0                //* USCI Baud Rate 0 */
    00150                         #define UCAxBR1          UCA1BR1                //* USCI Baud Rate 1 */
    00151                         #define UCAxMCTL           UCA1MCTL             //* USCI modulation control register*/
    00152                         #define UCAxSTAT         UCA1STAT               //* USCI Status Register */
    00153                         #define UCAxRXBUF        UCA1RXBUF      //* USCI Receive Buffer */
    00154                         #define UCAxTXBUF        UCA1TXBUF      //* USCI Transmit Buffer */
    00155                         #define UCAxICTL                         UCA1ICTL               //Interrupt control register
    00156                         #define UCAxIE                           UCA1IE                 //Interrupt Enable Register
    00157                         #define UCAxIFG                          UCA1IFG                //Interrupt Flag register
    00158                         #define UCAxIV                           UCA1IV                 //interrupt Vector register
    00159                         #define UCAxRXIE       BIT0
    00160                         #define UCAxTXIE       BIT1
    00161                         #define UCAxRXIFG      BIT0
    00162                         #define UCAxTXIFG      BIT1
    00163                 #endif
    00164           #ifdef   __MSP430_HAS_USCI_B1__
    00165                         #define UCBxCTL0                   UCB1CTL0             //* USCI Control Register 0 */
    00166                         #define UCBxCTL1         UCB1CTL1               //* USCI Control Register 1 */
    00167                         #define UCBxBR0          UCB1BR0                //* USCI Baud Rate 0 */
    00168                         #define UCBxBR1          UCB1BR1                //* USCI Baud Rate 1 */
    00169                         #define UCBxMCTL           UCB1MCTL             //* USCI modulation control register*/
    00170                         #define UCBxSTAT         UCB1STAT               //* USCI Status Register */
    00171                         #define UCBxRXBUF        UCB1RXBUF      //* USCI Receive Buffer */
    00172                         #define UCBxTXBUF        UCB1TXBUF      //* USCI Transmit Buffer */
    00173                         #define UCBxICTL                         UCB1ICTL               //Interrupt control register
    00174                         #define UCBxIE                           UCB1IE                 //Interrupt Enable Register
    00175                         #define UCBxIFG                          UCB1IFG                //Interrupt Flag register
    00176                         #define UCBxIV                           UCB1IV                 //interrupt Vector register
    00177                         #define UCBxRXIE       BIT0
    00178                         #define UCBxTXIE       BIT1
    00179                         #define UCBxRXIFG      BIT0
    00180                         #define UCBxTXIFG      BIT1
    00181                 #endif
    00182 #endif
    00183
    00184 #endif
    00185
    00186