/*
 * Copyright (c) 2021, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 *  ============ ti_msp_dl_config.c =============
 *  Configured MSPM0 DriverLib module definitions
 *
 *  DO NOT EDIT - This file is generated for the MSPM0L130X
 *  by the SysConfig tool.
 */

#include "ti_msp_dl_config.h"

/*
 *  ======== SYSCFG_DL_init ========
 *  Perform any initialization needed before using any board APIs
 */
SYSCONFIG_WEAK void SYSCFG_DL_init(void)
{
    SYSCFG_DL_initPower();
    SYSCFG_DL_GPIO_init();
    /* Module-Specific Initializations*/
    SYSCFG_DL_SYSCTL_init();
    SYSCFG_DL_TIMER_0_init();
    SYSCFG_DL_UART_R_init();
    SYSCFG_DL_UART_L_init();
}

SYSCONFIG_WEAK void SYSCFG_DL_initPower(void)
{
    DL_GPIO_reset(GPIOA);
    DL_TimerG_reset(TIMER_0_INST);
    DL_UART_Main_reset(UART_R_INST);
    DL_UART_Main_reset(UART_L_INST);

    DL_GPIO_enablePower(GPIOA);
    DL_TimerG_enablePower(TIMER_0_INST);
    DL_UART_Main_enablePower(UART_R_INST);
    DL_UART_Main_enablePower(UART_L_INST);
    delay_cycles(POWER_STARTUP_DELAY);
}

SYSCONFIG_WEAK void SYSCFG_DL_GPIO_init(void)
{

    DL_GPIO_initPeripheralOutputFunction(
        GPIO_UART_R_IOMUX_TX, GPIO_UART_R_IOMUX_TX_FUNC);
    DL_GPIO_initPeripheralInputFunction(
        GPIO_UART_R_IOMUX_RX, GPIO_UART_R_IOMUX_RX_FUNC);
    DL_GPIO_initPeripheralOutputFunction(
        GPIO_UART_L_IOMUX_TX, GPIO_UART_L_IOMUX_TX_FUNC);
    DL_GPIO_initPeripheralInputFunction(
        GPIO_UART_L_IOMUX_RX, GPIO_UART_L_IOMUX_RX_FUNC);

    DL_GPIO_initDigitalOutput(GPIO_General_O_LED_IOMUX);

    DL_GPIO_initDigitalInput(GPIO_General_I_HALL_IOMUX);

    DL_GPIO_initDigitalOutput(GPIO_General_O_REN_IOMUX);

    DL_GPIO_initDigitalOutput(GPIO_General_O_Charger_EN_IOMUX);

    DL_GPIO_initDigitalOutput(GPIO_General_O_Charger_COM_IOMUX);

    DL_GPIO_initDigitalOutput(GPIO_General_O_LEN_IOMUX);

    DL_GPIO_clearPins(GPIO_General_PORT, GPIO_General_O_LED_PIN);
    DL_GPIO_setPins(GPIO_General_PORT, GPIO_General_O_REN_PIN |
		GPIO_General_O_Charger_EN_PIN |
		GPIO_General_O_Charger_COM_PIN |
		GPIO_General_O_LEN_PIN);
    DL_GPIO_enableOutput(GPIO_General_PORT, GPIO_General_O_LED_PIN |
		GPIO_General_O_REN_PIN |
		GPIO_General_O_Charger_EN_PIN |
		GPIO_General_O_Charger_COM_PIN |
		GPIO_General_O_LEN_PIN);
    DL_GPIO_setUpperPinsPolarity(GPIO_General_PORT, DL_GPIO_PIN_17_EDGE_FALL);
    DL_GPIO_clearInterruptStatus(GPIO_General_PORT, GPIO_General_I_HALL_PIN);
    DL_GPIO_enableInterrupt(GPIO_General_PORT, GPIO_General_I_HALL_PIN);

}


SYSCONFIG_WEAK void SYSCFG_DL_SYSCTL_init(void)
{
    DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
    DL_SYSCTL_setMCLKDivider(DL_SYSCTL_MCLK_DIVIDER_DISABLE);

	//Low Power Mode is configured to be SLEEP0
    DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);

}



/*
 * Timer clock configuration to be sourced by BUSCLK /  (32000000 Hz)
 * timerClkFreq = (timerClkSrc / (timerClkDivRatio * (timerClkPrescale + 1)))
 *   125000 Hz = 32000000 Hz / (1 * (255 + 1))
 */
static const DL_TimerG_ClockConfig gTIMER_0ClockConfig = {
    .clockSel    = DL_TIMER_CLOCK_BUSCLK,
    .divideRatio = DL_TIMER_CLOCK_DIVIDE_1,
    .prescale    = 255U,
};

/*
 * Timer load value (where the counter starts from) is calculated as (timerPeriod * timerClockFreq) - 1
 * TIMER_0_INST_LOAD_VALUE = (10 ms * 125000 Hz) - 1
 */
static const DL_TimerG_TimerConfig gTIMER_0TimerConfig = {
    .period     = TIMER_0_INST_LOAD_VALUE,
    .timerMode  = DL_TIMER_TIMER_MODE_PERIODIC,
    .startTimer = DL_TIMER_STOP,
};

SYSCONFIG_WEAK void SYSCFG_DL_TIMER_0_init(void) {

    DL_TimerG_setClockConfig(TIMER_0_INST,
        (DL_TimerG_ClockConfig *) &gTIMER_0ClockConfig);

    DL_TimerG_initTimerMode(TIMER_0_INST,
        (DL_TimerG_TimerConfig *) &gTIMER_0TimerConfig);
    DL_TimerG_enableInterrupt(TIMER_0_INST , DL_TIMERG_INTERRUPT_ZERO_EVENT);
    DL_TimerG_enableClock(TIMER_0_INST);




}



static const DL_UART_Main_ClockConfig gUART_RClockConfig = {
    .clockSel    = DL_UART_MAIN_CLOCK_BUSCLK,
    .divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1
};

static const DL_UART_Main_Config gUART_RConfig = {
    .mode        = DL_UART_MAIN_MODE_NORMAL,
    .direction   = DL_UART_MAIN_DIRECTION_TX_RX,
    .flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE,
    .parity      = DL_UART_MAIN_PARITY_NONE,
    .wordLength  = DL_UART_MAIN_WORD_LENGTH_8_BITS,
    .stopBits    = DL_UART_MAIN_STOP_BITS_TWO
};

SYSCONFIG_WEAK void SYSCFG_DL_UART_R_init(void)
{
    DL_UART_Main_setClockConfig(UART_R_INST, (DL_UART_Main_ClockConfig *) &gUART_RClockConfig);

    DL_UART_Main_init(UART_R_INST, (DL_UART_Main_Config *) &gUART_RConfig);
    /*
     * Configure baud rate by setting oversampling and baud rate divisors.
     *  Target baud rate: 1200
     *  Actual baud rate: 1200
     */
    DL_UART_Main_setOversampling(UART_R_INST, DL_UART_OVERSAMPLING_RATE_16X);
    DL_UART_Main_setBaudRateDivisor(UART_R_INST,
        UART_R_IBRD_32_MHZ_1200_BAUD, UART_R_FBRD_32_MHZ_1200_BAUD);
    /* Configure Interrupts */
    DL_UART_Main_enableInterrupt(UART_R_INST,
                                 DL_UART_MAIN_INTERRUPT_RX);
    /* Setting the Interrupt Priority */
    NVIC_SetPriority(UART_R_INST_INT_IRQN, 0);

    /* Configure FIFOs */
    DL_UART_Main_enableFIFOs(UART_R_INST);
    DL_UART_Main_setRXFIFOThreshold(UART_R_INST, DL_UART_RX_FIFO_LEVEL_1_2_FULL);
    DL_UART_Main_setTXFIFOThreshold(UART_R_INST, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY);

    DL_UART_Main_enable(UART_R_INST);
}

static const DL_UART_Main_ClockConfig gUART_LClockConfig = {
    .clockSel    = DL_UART_MAIN_CLOCK_BUSCLK,
    .divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1
};

static const DL_UART_Main_Config gUART_LConfig = {
    .mode        = DL_UART_MAIN_MODE_NORMAL,
    .direction   = DL_UART_MAIN_DIRECTION_TX_RX,
    .flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE,
    .parity      = DL_UART_MAIN_PARITY_NONE,
    .wordLength  = DL_UART_MAIN_WORD_LENGTH_8_BITS,
    .stopBits    = DL_UART_MAIN_STOP_BITS_TWO
};

SYSCONFIG_WEAK void SYSCFG_DL_UART_L_init(void)
{
    DL_UART_Main_setClockConfig(UART_L_INST, (DL_UART_Main_ClockConfig *) &gUART_LClockConfig);

    DL_UART_Main_init(UART_L_INST, (DL_UART_Main_Config *) &gUART_LConfig);
    /*
     * Configure baud rate by setting oversampling and baud rate divisors.
     *  Target baud rate: 1200
     *  Actual baud rate: 1200
     */
    DL_UART_Main_setOversampling(UART_L_INST, DL_UART_OVERSAMPLING_RATE_16X);
    DL_UART_Main_setBaudRateDivisor(UART_L_INST,
        UART_L_IBRD_32_MHZ_1200_BAUD, UART_L_FBRD_32_MHZ_1200_BAUD);
    /* Configure Interrupts */
    DL_UART_Main_enableInterrupt(UART_L_INST,
                                 DL_UART_MAIN_INTERRUPT_RX);
    /* Setting the Interrupt Priority */
    NVIC_SetPriority(UART_L_INST_INT_IRQN, 0);

    /* Configure FIFOs */
    DL_UART_Main_enableFIFOs(UART_L_INST);
    DL_UART_Main_setRXFIFOThreshold(UART_L_INST, DL_UART_RX_FIFO_LEVEL_1_2_FULL);
    DL_UART_Main_setTXFIFOThreshold(UART_L_INST, DL_UART_TX_FIFO_LEVEL_1_2_EMPTY);

    DL_UART_Main_enable(UART_L_INST);
}

