# 22 Oct 2024 11:03 AM
#
CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.006750
    bb_via2line = 0.004000
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.004000
    line2smd_pin = 0.003000
    line2shape = 0.010000
    line2tst_pin = 0.003750
    line2tst_via = 0.004000
    line2thru_pin = 0.003750
    line2thru_via = 0.003000
    shape2smd_pin = 0.004000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.004000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.003200
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004000
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l2-gnd1
    bb_via2bb_via = 0.006750
    bb_via2line = 0.004000
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.004000
    line2smd_pin = 0.004000
    line2shape = 0.010000
    line2tst_pin = 0.004000
    line2tst_via = 0.004000
    line2thru_pin = 0.004000
    line2thru_via = 0.004000
    shape2smd_pin = 0.005000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.005000
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004000
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l2-gnd1
    main_set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l6-gnd3
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l8-pwr1
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l13-gnd5
    set_name = CSET00001
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l15-gnd6
    set_name = CSET00001
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l3-signal1
    bb_via2bb_via = 0.006750
    bb_via2line = 0.003750
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.003000
    line2smd_pin = 0.004000
    line2shape = 0.010000
    line2tst_pin = 0.004000
    line2tst_via = 0.003750
    line2thru_pin = 0.004000
    line2thru_via = 0.003000
    shape2smd_pin = 0.005000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.005000
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.003750
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l4-gnd2
    bb_via2bb_via = 0.006750
    bb_via2line = 0.003750
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.004000
    line2smd_pin = 0.004000
    line2shape = 0.010000
    line2tst_pin = 0.004000
    line2tst_via = 0.003750
    line2thru_pin = 0.004000
    line2thru_via = 0.003500
    shape2smd_pin = 0.005000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.005000
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.003750
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l5-signal2
    bb_via2bb_via = 0.006750
    bb_via2line = 0.004000
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.004000
    line2smd_pin = 0.004000
    line2shape = 0.010000
    line2tst_pin = 0.004000
    line2tst_via = 0.004000
    line2thru_pin = 0.004000
    line2thru_via = 0.003000
    shape2smd_pin = 0.005000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.005000
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004000
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l7-signal3
    bb_via2bb_via = 0.006750
    bb_via2line = 0.004000
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.003000
    line2smd_pin = 0.004000
    line2shape = 0.010000
    line2tst_pin = 0.004000
    line2tst_via = 0.004000
    line2thru_pin = 0.004000
    line2thru_via = 0.003000
    shape2smd_pin = 0.005000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.005000
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004000
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l7-signal3
    main_set_name = CSET00002
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l10-signal4
    set_name = CSET00002
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l9-pwr2
    bb_via2bb_via = 0.006750
    bb_via2line = 0.004000
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.004000
    line2smd_pin = 0.004000
    line2shape = 0.010000
    line2tst_pin = 0.004000
    line2tst_via = 0.004000
    line2thru_pin = 0.004000
    line2thru_via = 0.003490
    shape2smd_pin = 0.005000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.005000
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004000
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l12-signal5
    bb_via2bb_via = 0.006750
    bb_via2line = 0.004000
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.003000
    line2smd_pin = 0.004000
    line2shape = 0.010000
    line2tst_pin = 0.004000
    line2tst_via = 0.004000
    line2thru_pin = 0.004000
    line2thru_via = 0.002990
    shape2smd_pin = 0.005000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.005000
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004000
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = l14-signal6
    bb_via2bb_via = 0.006750
    bb_via2line = 0.004000
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.010000
    line2line = 0.003000
    line2smd_pin = 0.004000
    line2shape = 0.010000
    line2tst_pin = 0.004000
    line2tst_via = 0.004000
    line2thru_pin = 0.003750
    line2thru_via = 0.003000
    shape2smd_pin = 0.005000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.005000
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004000
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.010000
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = BGA-BGA
    net_type1 = *
    net_type2 = *
    layers = bottom
    bb_via2bb_via = 0.006750
    bb_via2line = 0.003750
    bb_via2smd_pin = 0.004000
    bb_via2shape = 0.004500
    bb_via2tst_pin = 0.004000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.004000
    bb_via2thru_via = 0.010000
    line2line = 0.003750
    line2smd_pin = 0.003750
    line2shape = 0.010000
    line2tst_pin = 0.003750
    line2tst_via = 0.003750
    line2thru_pin = 0.003400
    line2thru_via = 0.003200
    shape2smd_pin = 0.005000
    shape2shape = 0.008000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.004500
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.004750
    smd_pin2tst_pin = 0.004750
    smd_pin2tst_via = 0.004000
    smd_pin2thru_pin = 0.004750
    smd_pin2thru_via = 0.003200
    tst_pin2tst_pin = 0.004750
    tst_pin2tst_via = 0.004000
    tst_pin2thru_pin = 0.004750
    tst_pin2thru_via = 0.004000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.004000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.004750
    thru_pin2thru_via = 0.004000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.004000
    smd_pin2bond_pad = 0.004000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.003750
    bond_pad2shape = 0.004500
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.004000
    tst_via2bond_pad = 0.010000
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = top
    bb_via2bb_via = 0.006000
    bb_via2line = 0.004750
    bb_via2smd_pin = 0.005000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.005000
    bb_via2tst_via = 0.006000
    bb_via2thru_pin = 0.005000
    bb_via2thru_via = 0.006000
    line2line = 0.004800
    line2smd_pin = 0.005000
    line2shape = 0.005000
    line2tst_pin = 0.005000
    line2tst_via = 0.004750
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.005000
    shape2shape = 0.010000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.005000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.004250
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.005000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.005000
    tst_via2tst_via = 0.006000
    tst_via2thru_pin = 0.005000
    tst_via2thru_via = 0.006000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.005000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.005000
    smd_pin2bond_pad = 0.005000
    thru_via2bond_pad = 0.006000
    bond_pad2bond_pad = 0.006000
    bond_pad2line = 0.004750
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.006000
    tst_pin2bond_pad = 0.005000
    tst_via2bond_pad = 0.006000
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l2-gnd1
    bb_via2bb_via = 0.010000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.010000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.010000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.010000
    bb_via2thru_via = 0.010000
    line2line = 0.005000
    line2smd_pin = 0.005000
    line2shape = 0.005000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.005000
    shape2smd_pin = 0.005000
    shape2shape = 0.010000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.010000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.010000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.010000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.010000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.010000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.010000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.010000
    smd_pin2bond_pad = 0.010000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.010000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l2-gnd1
    main_set_name = CSET00003
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l15-gnd6
    set_name = CSET00003
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l3-signal1
    bb_via2bb_via = 0.010000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.010000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.010000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.010000
    bb_via2thru_via = 0.010000
    line2line = 0.005000
    line2smd_pin = 0.005000
    line2shape = 0.012000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.005000
    shape2shape = 0.010000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.010000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.010000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.010000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.010000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.010000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.010000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.010000
    smd_pin2bond_pad = 0.010000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.010000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l3-signal1
    main_set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l4-gnd2
    set_name = CSET00004
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l5-signal2
    set_name = CSET00004
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l6-gnd3
    bb_via2bb_via = 0.010000
    bb_via2line = 0.005000
    bb_via2smd_pin = 0.010000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.010000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.010000
    bb_via2thru_via = 0.010000
    line2line = 0.005000
    line2smd_pin = 0.005000
    line2shape = 0.012000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.005000
    shape2smd_pin = 0.005000
    shape2shape = 0.010000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.010000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.010000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.010000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.010000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.010000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.010000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.010000
    smd_pin2bond_pad = 0.010000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.010000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l6-gnd3
    main_set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l11-gnd4
    set_name = CSET00005
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l13-gnd5
    set_name = CSET00005
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l7-signal3
    bb_via2bb_via = 0.010000
    bb_via2line = 0.004000
    bb_via2smd_pin = 0.010000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.010000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.010000
    bb_via2thru_via = 0.010000
    line2line = 0.004500
    line2smd_pin = 0.004500
    line2shape = 0.012000
    line2tst_pin = 0.004500
    line2tst_via = 0.004000
    line2thru_pin = 0.004500
    line2thru_via = 0.004000
    shape2smd_pin = 0.005000
    shape2shape = 0.010000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.010000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.010000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.010000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.010000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.010000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.010000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.010000
    smd_pin2bond_pad = 0.010000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.010000
    tst_via2bond_pad = 0.010000
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l8-pwr1
    bb_via2bb_via = 0.010000
    bb_via2line = 0.004700
    bb_via2smd_pin = 0.010000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.010000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.010000
    bb_via2thru_via = 0.010000
    line2line = 0.005000
    line2smd_pin = 0.005000
    line2shape = 0.012000
    line2tst_pin = 0.005000
    line2tst_via = 0.005000
    line2thru_pin = 0.005000
    line2thru_via = 0.004000
    shape2smd_pin = 0.005000
    shape2shape = 0.010000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.010000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.010000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.010000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.010000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.010000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.010000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.010000
    smd_pin2bond_pad = 0.010000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.005000
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.010000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l8-pwr1
    main_set_name = CSET00006
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l9-pwr2
    set_name = CSET00006
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l10-signal4
    bb_via2bb_via = 0.010000
    bb_via2line = 0.004500
    bb_via2smd_pin = 0.010000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.010000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.010000
    bb_via2thru_via = 0.010000
    line2line = 0.004500
    line2smd_pin = 0.004500
    line2shape = 0.012000
    line2tst_pin = 0.004500
    line2tst_via = 0.004500
    line2thru_pin = 0.004500
    line2thru_via = 0.004000
    shape2smd_pin = 0.005000
    shape2shape = 0.010000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.010000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.010000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.010000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.010000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.010000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.010000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.010000
    smd_pin2bond_pad = 0.010000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004500
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.010000
    tst_via2bond_pad = 0.010000
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l10-signal4
    main_set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l12-signal5
    set_name = CSET00007
}

CNSA_KEY_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = l14-signal6
    set_name = CSET00007
}

CNSA_NET_TYPE_CLEARANCES {
    constr_area = *
    net_type1 = *
    net_type2 = *
    layers = bottom
    bb_via2bb_via = 0.010000
    bb_via2line = 0.004500
    bb_via2smd_pin = 0.006000
    bb_via2shape = 0.005000
    bb_via2tst_pin = 0.006000
    bb_via2tst_via = 0.010000
    bb_via2thru_pin = 0.006000
    bb_via2thru_via = 0.010000
    line2line = 0.004500
    line2smd_pin = 0.004500
    line2shape = 0.005000
    line2tst_pin = 0.004500
    line2tst_via = 0.004500
    line2thru_pin = 0.004500
    line2thru_via = 0.004000
    shape2smd_pin = 0.005000
    shape2shape = 0.010000
    shape2tst_pin = 0.005000
    shape2tst_via = 0.005000
    shape2thru_pin = 0.005000
    shape2thru_via = 0.004000
    smd_pin2smd_pin = 0.005000
    smd_pin2tst_pin = 0.005000
    smd_pin2tst_via = 0.006000
    smd_pin2thru_pin = 0.005000
    smd_pin2thru_via = 0.005000
    tst_pin2tst_pin = 0.005000
    tst_pin2tst_via = 0.006000
    tst_pin2thru_pin = 0.005000
    tst_pin2thru_via = 0.006000
    tst_via2tst_via = 0.010000
    tst_via2thru_pin = 0.006000
    tst_via2thru_via = 0.010000
    thru_pin2thru_pin = 0.005000
    thru_pin2thru_via = 0.006000
    thru_via2thru_via = 0.006000
    thru_pin2bond_pad = 0.006000
    smd_pin2bond_pad = 0.006000
    thru_via2bond_pad = 0.010000
    bond_pad2bond_pad = 0.010000
    bond_pad2line = 0.004500
    bond_pad2shape = 0.005000
    bb_via2bond_pad = 0.010000
    tst_pin2bond_pad = 0.006000
    tst_via2bond_pad = 0.010000
}

CNSA_NET_TYPE_PHYSICAL_PARAMS {
    constr_area = *
    net_type = *
    layers = *
    min_line_width = 0.009000
    min_neck_width = 0.006000
    max_line_length = 0.500000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-OSPI0-DQS
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MMC1-CLK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-1-DQS3-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR3-DQS3-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR3-DQS1-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR2-DQS1-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR2-DQS0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR2-DQS3-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR2-DQS2-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MMC0-DAT2
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MMC1-CMD
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MMC0-CLK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = SOC-MCU-OSPI0-D0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = SOC-MCU-OSPI0-CLK-R
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CSI0-RXCLK-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CSI1-RX0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-DQS0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-3-DQ7
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCASP0-AXR7-PRG0-RGMII1-TD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-OSPI0-D0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CSI0-RX0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CSI2-RX0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-RGMII1-TD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CSI1-TX0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-HYPERBUS0-CK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-RGMII1-TD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-OSPI1-CLK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-1-DQS1-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-1-DQ24
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-3-CA0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-3-DQS2-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-3-DQS0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-3-DQS0-P
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MLB0-MLBCLK-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-HYPERBUS0-DQ0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-HYPERBUS0-RWDS-R
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR2-CA5
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-CA5
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-0-DQ23
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-0-CK-C
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-CA5
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-DQ24
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-DQ16
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-DQ0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = LPDDR4-DQ8
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA16-PRG1-RGMII1-TD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCASP1-AXR7-PRG0-RGMII2-TD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA12-PRG1-RGMII2-TD1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA11-PRG1-RGMII2-TD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = PRG0-RGMII-R
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCASP0-AXR0-PRG0-RGMII1-RD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = GPIO0-66-PRG0-RGMII2-RD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = GPIO0-4-PRG1-RGMII1-RD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA3-PRG1-RGMII2-RD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA4-PRG1-RGMII2-RX-CTL
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA6-PRG1-RGMII2-RXC
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = VOUT0-DATA0-PRG1-RGMII2-RD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-RGMII1-RD3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-OSPI1-D0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DSI0-TX0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CS-SOC-MCU-OSPI0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CS-MCU-OSPI1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CS-MCU-OSPI0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CS-HYPERBUS0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = GESI-RGMII1-TD0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.001000
    dpair_phase_tolerance_pl = 0.001000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MCU-RGMII1-D0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = RGMII1-D0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR3-DL3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR3-DL2
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR3-DL1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR3-DL0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR3-CA
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-CA
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-DL3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-DL2
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-DL1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-DL0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR1-ADD-SOC-TPOINT
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-DL3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-DL2
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-DL1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR2-DL2
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-DL0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR2-DL3
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR2-CA
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR2-DL1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR2-DL0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR0-CA
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = 66-OHM
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = 100-OHM
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = 90-OHM
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002000
    dpair_phase_tolerance_pl = 0.002000
}

NET_ECSET_ENTRY {
    net_name = CSI0_RX0_N
    ecset_name = CSI0-RXCLK-N
}

NET_ECSET_ENTRY {
    net_name = CSI0_RX0_P
    ecset_name = CSI0-RXCLK-N
}

NET_ECSET_ENTRY {
    net_name = CSI0_RX1_N
    ecset_name = CSI0-RXCLK-N
}

NET_ECSET_ENTRY {
    net_name = CSI0_RX1_P
    ecset_name = CSI0-RXCLK-N
}

NET_ECSET_ENTRY {
    net_name = CSI0_RX2_N
    ecset_name = CSI0-RXCLK-N
}

NET_ECSET_ENTRY {
    net_name = CSI0_RX2_P
    ecset_name = CSI0-RXCLK-N
}

NET_ECSET_ENTRY {
    net_name = CSI0_RX3_N
    ecset_name = CSI0-RXCLK-N
}

NET_ECSET_ENTRY {
    net_name = CSI0_RX3_P
    ecset_name = CSI0-RXCLK-N
}

NET_ECSET_ENTRY {
    net_name = CSI0_RXCLK_N
    ecset_name = CSI0-RXCLK-N
}

NET_ECSET_ENTRY {
    net_name = CSI0_RXCLK_P
    ecset_name = CSI0-RXCLK-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_RX0_N
    ecset_name = CSI1-RX0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_RX0_P
    ecset_name = CSI1-RX0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_RX1_N
    ecset_name = CSI1-RX0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_RX1_P
    ecset_name = CSI1-RX0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_RX2_N
    ecset_name = CSI1-RX0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_RX2_P
    ecset_name = CSI1-RX0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_RX3_N
    ecset_name = CSI1-RX0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_RX3_P
    ecset_name = CSI1-RX0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_RXCLK_N
    ecset_name = CSI1-RX0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_RXCLK_P
    ecset_name = CSI1-RX0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DM0_DBI0#
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQ0
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQ1
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQ2
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQ3
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQ4
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQ5
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQ6
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQ7
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQS0_N
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR0_DQS0_P
    ecset_name = DDR0-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DM0_DBI0#
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DM1_DBI1#
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DM2_DBI2#
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DM3_DBI3#
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ0
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ1
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ10
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ11
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ12
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ13
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ14
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ15
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ16
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ17
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ18
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ19
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ2
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ20
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ21
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ22
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ23
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ24
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ25
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ26
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ27
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ28
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ29
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ3
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ30
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ31
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ4
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ5
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ6
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ7
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ8
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQ9
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQS0_N
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQS0_P
    ecset_name = DDR2-DQS0-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQS1_N
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQS1_P
    ecset_name = DDR2-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQS2_N
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQS2_P
    ecset_name = DDR2-DQS2-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQS3_N
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR2_DQS3_P
    ecset_name = DDR2-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DM1_DBI1#
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DM3_DBI3#
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ10
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ11
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ12
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ13
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ14
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ15
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ24
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ25
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ26
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ27
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ28
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ29
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ30
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ31
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ8
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQ9
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQS1_N
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQS1_P
    ecset_name = DDR3-DQS1-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQS3_N
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = DDR3_DQS3_P
    ecset_name = DDR3-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DM3_DBI2_N
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DQ24
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DQ25
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DQ26
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DQ27
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DQ28
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DQ29
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DQ30
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DQ31
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DQS3_N
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = LPDDR4_1_DQS3_P
    ecset_name = LPDDR4-1-DQS3-N
}

NET_ECSET_ENTRY {
    net_name = MCU_OSPI0_DQS
    ecset_name = MCU-OSPI0-DQS
}

NET_ECSET_ENTRY {
    net_name = MMC0_CLK
    ecset_name = MMC0-CLK
}

NET_ECSET_ENTRY {
    net_name = MMC0_CMD
    ecset_name = MMC0-DAT2
}

NET_ECSET_ENTRY {
    net_name = MMC0_DAT0
    ecset_name = MMC0-DAT2
}

NET_ECSET_ENTRY {
    net_name = MMC0_DAT1
    ecset_name = MMC0-DAT2
}

NET_ECSET_ENTRY {
    net_name = MMC0_DAT2
    ecset_name = MMC0-DAT2
}

NET_ECSET_ENTRY {
    net_name = MMC0_DAT3
    ecset_name = MMC0-DAT2
}

NET_ECSET_ENTRY {
    net_name = MMC1_CLK
    ecset_name = MMC1-CLK
}

NET_ECSET_ENTRY {
    net_name = MMC1_CLK_R
    ecset_name = MMC1-CLK
}

NET_ECSET_ENTRY {
    net_name = MMC1_CMD
    ecset_name = MMC1-CMD
}

NET_ECSET_ENTRY {
    net_name = MMC1_DAT0
    ecset_name = MMC1-CMD
}

NET_ECSET_ENTRY {
    net_name = MMC1_DAT1
    ecset_name = MMC1-CMD
}

NET_ECSET_ENTRY {
    net_name = MMC1_DAT2
    ecset_name = MMC1-CMD
}

NET_ECSET_ENTRY {
    net_name = MMC1_DAT3
    ecset_name = MMC1-CMD
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_CLK
    ecset_name = SOC-MCU-OSPI0-CLK-R
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_CS0#
    ecset_name = SOC-MCU-OSPI0-D0
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_D0
    ecset_name = SOC-MCU-OSPI0-D0
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_D1
    ecset_name = SOC-MCU-OSPI0-D0
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_D2
    ecset_name = SOC-MCU-OSPI0-D0
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_D3
    ecset_name = SOC-MCU-OSPI0-D0
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_D4
    ecset_name = SOC-MCU-OSPI0-D0
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_D5
    ecset_name = SOC-MCU-OSPI0-D0
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_D6
    ecset_name = SOC-MCU-OSPI0-D0
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_D7
    ecset_name = SOC-MCU-OSPI0-D0
}

NET_ECSET_ENTRY {
    net_name = SOC_MCU_OSPI0_DQS
    ecset_name = MCU-OSPI0-DQS
}

