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Expedition PCB - Pinnacle - Version EXP2005.3_070529.00 2005.3
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Job Directory:        C:\ILS Projects\AFE5809_RevA_EVM\PCB\

Design Status Report: C:\ILS Projects\AFE5809_RevA_EVM\PCB\LogFiles\DesignStatus_00.txt

Mon Jul 23 19:28:17 2012

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DESIGN STATUS
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Board Size Extents  ............ 6 X 5 (in)
Route Border Extents  .......... 5.95 X 4.95 (in)
Actual Board Area  ............. 30 (in)
Actual Route Area  ............. 29.453 (in)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    60 Sq. (in)       11.388 Sq. (in)   18.98 %

Pins  .......................... 1268
Pins per Route Area  ........... 43.052 Pins/Sq. (in)

Layers  ........................ 6
    Layer 1 is a signal layer
        Trace Widths  .......... 4.1, 5, 6, 6.9, 10, 12, 15, 20, 25, 30, 40
    Layer 2 is a Positive Plane Layer with nets
        GND
        DGND
        Trace Widths  .......... None.
    Layer 3 is a Positive Plane Layer with nets
        +5V
        +5VA
        AVDD
        3.3V_USB
        CLKBUF_AVCC
        CLKBUF_VCC
        +5V_USB
        AVDD_ADC
        DVDD
        Trace Widths  .......... None.
    Layer 4 is a signal layer
        Trace Widths  .......... 6.9, 12, 20, 25, 30
    Layer 5 is a Positive Plane Layer with nets
        GND
        DGND
        Trace Widths  .......... None.
    Layer 6 is a signal layer
        Trace Widths  .......... 5, 6.9, 10, 12, 15, 20, 25, 30, 40, 50

Nets  .......................... 230
Connections  ................... 1060
Open Connections  .............. 0
Differential Pairs  ............ 0
Percent Routed  ................ 100.00 %

Netline Length  ................ 42.305 (in)
Netline Manhattan Length  ...... 45.186 (in)
Total Trace Length  ............ 247.737 (in)

Trace Widths Used (th)  ........ 4.1, 5, 6, 6.9, 10, 12, 15, 20, 25, 30, 40, 50
Vias  .......................... 677
Via Span  Name                   Quantity
   1-6    V16D8_TENT             95
          V20D10                 582

Teardrops....................... 0
Breakouts....................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 376
    Parts Mounted on Top  ...... 209
        SMD  ................... 126
        Through  ............... 83
        Test Points  ........... 0
        Mechanical  ............ 0
    Parts Mounted on Bottom  ... 160
        SMD  ................... 160
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    Edge Connector Parts  ...... 7

Parts not Placed  .............. 0

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 883
    Holes per Board Area  ...... 29.433 Holes/Sq. (in)
Mounting Holes  ................ 16
