Altium

Design Rule Verification Report

Date: 10/18/2023
Time: 10:23:07 AM
Elapsed Time: 00:00:31
Filename: C:\SVN\Motor_Drives_Sector\1 - TIDA\TIDA-010255\Design\Altium\Rev E2\TIDA-010255 Altium revE2.TI.com\TIDA-010255-E2.PcbDoc
Warnings: 0
Rule Violations: 0
Waived Violations: 15

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=0.2mm) (All),(All) 0
Clearance Constraint (Gap=0.2mm) (All),(All) 0
Clearance Constraint (Gap=0mm) (IsKeepOut and InComponentClass('FiducialMark')),(IsPad and InComponentClass('FiducialMark')) 0
Clearance Constraint (Gap=0mm) (((IsTrack Or IsArc) And Not InPoly) And IsFree and IsKeepOut),(((IsTrack Or IsArc) And Not InPoly) And IsFree and IsKeepOut) 0
Clearance Constraint (Gap=0.8mm) (InNetClass('HVBUS')),(NOT InNetClass('HVBUS')) 0
Clearance Constraint (Gap=1.6mm) (InNetClass('HVBUS') AND (OnBottomLayer OR OnTopLayer OR OnLayer('Multi-Layer'))),(NOT InNetClass('HVBUS') AND (OnBottomLayer OR OnTopLayer OR OnLayer('Multi-Layer'))) 0
Clearance Constraint (Gap=0.128mm) (IsStitchingVia and InNet('GND')),((IsVia and (Not IsStitchingVia)) Or IsPad) 0
Short-Circuit Constraint (Allowed=No) ((InNet('SW_W') AND InComponent('U1_W'))),(All) 0
Short-Circuit Constraint (Allowed=Yes) (HasFootprint('RQZ0054A-MFG')),(IsVia or IsPad) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Width Constraint (Min=0.1524mm) (Max=2.54mm) (Preferred=0.254mm) (All) 0
Power Plane Connect Rule(Direct Connect )(Expansion=0.254mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All) 0
Minimum Annular Ring (Minimum=0.15mm) (All) 0
Minimum Annular Ring (Minimum=0.15mm) (IsVia and InAnyComponent) 0
Acute Angle Constraint (Minimum=45.000) (All) 0
Hole Size Constraint (Min=0.2mm) (Max=6.3754mm) (All) 0
Hole To Hole Clearance (Gap=0.254mm) (All),(All) 0
Minimum Solder Mask Sliver (Gap=0.01778mm) (InComponentClass('Logo')),(InComponentClass('Logo')) 0
Minimum Solder Mask Sliver (Gap=0.1mm) (All),(All) 0
Silk To Solder Mask (Clearance=0.127mm) ((IsPad or IsFill or IsRegion) and InAnycomponent),(All) 0
Silk To Solder Mask (Clearance=0.1mm) (All),(All) 0
Silk to Silk (Clearance=0mm) ((HasFootprint('Pb-Free_Overlay_Medium') OR HasFootprint('Pb-Free_Overlay_Small'))),((HasFootprint('Pb-Free_Overlay_Medium') OR HasFootprint('Pb-Free_Overlay_Small'))) 0
Silk to Silk (Clearance=0.1mm) (All),(All) 0
Net Antennae (Tolerance=0mm) (All) 0
Board Clearance Constraint (Gap=0mm) (OnCopper and InComponentClass('Mounting Holes')) 0
Board Clearance Constraint (Gap=0mm) (OnCopper and Not InComponentClass('Logo') and not InComponentClass('FiducialMark') and not InRegion(1000,500,4000,800) and not InPoly) 0
Board Clearance Constraint (Gap=0mm) (OnCopper and IsPoly) 0
Component Clearance Constraint ( Horizontal Gap = 0.38mm, Vertical Gap = 0.254mm ) (HasFootprint('0201*') or HasFootprint('0402*') or HasFootprint('0508') or HasFootprint('0603*') or HasFootprint('0612') or HasFootprint('0805*') or HasFootprint('0815*') or HasFootprint('0830*') or HasFootprint('1206*') or HasFootprint('1210*') or HasFootprint('1808*') or HasFootprint('1812*') or HasFootprint('1825*') or HasFootprint('2010*') or HasFootprint('2220*') or HasFootprint('2225*') or HasFootprint('2512*') or HasFootprint('2728*') or HasFootprint('3518*')),(HasFootprint('0201*') or HasFootprint('0402*') or HasFootprint('0508') or HasFootprint('0603*') or HasFootprint('0612') or HasFootprint('0805*') or HasFootprint('0815*') or HasFootprint('0830*') or HasFootprint('1206*') or HasFootprint('1210*') or HasFootprint('1808*') or HasFootprint('1812*') or HasFootprint('1825*') or HasFootprint('2010*') or HasFootprint('2220*') or HasFootprint('2225*') or HasFootprint('2512*') or HasFootprint('2728*') or HasFootprint('3518*')) 0
Component Clearance Constraint ( Horizontal Gap = 0.508mm, Vertical Gap = 0.254mm ) (All),(All) 0
Component Clearance Constraint ( Horizontal Gap = 2.54mm, Vertical Gap = Infinite ) (InComponentClass('Mounting Holes')),(All) 0
Component Clearance Constraint ( Horizontal Gap = 0.508mm, Vertical Gap = 0.762mm ) (IsThruComponent),(IsThruComponent) 0
Component Clearance Constraint ( Horizontal Gap = 0.762mm, Vertical Gap = 0.762mm ) (IsThruComponent),(IsSMTComponent) 0
Component Clearance Constraint ( Horizontal Gap = 1.27mm, Vertical Gap = 0.254mm ) (InComponentClass('Mounting Holes')),(InComponentClass('FiducialMark')) 0
Component Clearance Constraint ( Horizontal Gap = 0.762mm, Vertical Gap = 0.254mm ) (InComponentClass('Logo')),(All) 0
Component Clearance Constraint ( Horizontal Gap = 0.127mm, Vertical Gap = 0.254mm ) ((HasFootprint('NY PMS 440 0025 PH'))),((HasFootprint('Keystone_1902C'))) 0
Component Clearance Constraint ( Horizontal Gap = 0mm, Vertical Gap = 0mm ) (InComponentClass('Header')),(InComponentClass('Shunt')) 0
Total 0

Waived Violations Count
Clearance Constraint (Gap=0.2mm) (All),(All) 6
Minimum Solder Mask Sliver (Gap=0.1mm) (All),(All) 4
Silk To Solder Mask (Clearance=0.127mm) ((IsPad or IsFill or IsRegion) and InAnycomponent),(All) 1
Component Clearance Constraint ( Horizontal Gap = 0.127mm, Vertical Gap = 0.254mm ) ((HasFootprint('NY PMS 440 0025 PH'))),((HasFootprint('Keystone_1902C'))) 4
Total 15

Rule Violations

Waived Violations

Clearance Constraint (Gap=0.2mm) (All),(All)
Clearance Constraint: (Collision < 0.2mm) Between Arc (191.98191mm,74.97309mm) on Top Layer And Pad FID5-1(191.98191mm,74.97309mm) on Top Layer
Waived by Martin Staebler at 8/1/2023 12:30:48 AM
Clearance Constraint: (Collision < 0.2mm) Between Arc (192.75mm,-0.9mm) on Top Layer And Pad FID2-1(192.75mm,-0.9mm) on Top Layer
Waived by Martin Staebler at 8/1/2023 12:30:53 AM
Clearance Constraint: (Collision < 0.2mm) Between Arc (193.2mm,9mm) on Top Layer And Pad FID1-1(193.2mm,9mm) on Top Layer
Waived by Martin Staebler at 8/1/2023 12:30:57 AM
Clearance Constraint: (Collision < 0.2mm) Between Arc (53.95818mm,73.5666mm) on Top Layer And Pad FID6-1(53.95818mm,73.5666mm) on Top Layer
Waived by Martin Staebler at 8/1/2023 12:31:01 AM
Clearance Constraint: (Collision < 0.2mm) Between Arc (56.756mm,41.85539mm) on Top Layer And Pad FID4-1(56.756mm,41.85539mm) on Top Layer
Waived by Martin Staebler at 8/1/2023 12:31:06 AM
Clearance Constraint: (Collision < 0.2mm) Between Arc (64.87556mm,-9.34138mm) on Top Layer And Pad FID3-1(64.87556mm,-9.34138mm) on Top Layer
Waived by Martin Staebler at 8/1/2023 12:31:12 AM

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Minimum Solder Mask Sliver (Gap=0.1mm) (All),(All)
Minimum Solder Mask Sliver Constraint: (0.03922mm < 0.1mm) Between Pad U14-15(75.66042mm,12.2945mm) on Top Layer And Via (74.66042mm,11.2945mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.03922mm]
Waived by Ester Vicario at 7/7/2023 10:37:47 AM
Minimum Solder Mask Sliver Constraint: (0.03922mm < 0.1mm) Between Pad U14-15(75.66042mm,12.2945mm) on Top Layer And Via (74.66042mm,13.2945mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.03922mm]
Waived by Ester Vicario at 7/7/2023 10:37:47 AM
Minimum Solder Mask Sliver Constraint: (0.03922mm < 0.1mm) Between Pad U14-15(75.66042mm,12.2945mm) on Top Layer And Via (76.66042mm,11.2945mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.03922mm]
Waived by Ester Vicario at 7/7/2023 10:37:47 AM
Minimum Solder Mask Sliver Constraint: (0.03922mm < 0.1mm) Between Pad U14-15(75.66042mm,12.2945mm) on Top Layer And Via (76.66042mm,13.2945mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.03922mm]
Waived by Ester Vicario at 7/7/2023 10:37:47 AM

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Silk To Solder Mask (Clearance=0.127mm) ((IsPad or IsFill or IsRegion) and InAnycomponent),(All)
Silk To Solder Mask Clearance Constraint: (0.0902mm < 0.127mm) Between Area Fill (67.1102mm,4.90235mm) (67.6182mm,7.23915mm) on Bottom Overlay And Track (66.5125mm,6.07075mm)(68.58637mm,6.07075mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.0902mm]
Waived by Martin Staebler at 10/18/2023 10:21:45 AM
Symbol in Altium VAULT created with <0.127mm clearance

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Component Clearance Constraint ( Horizontal Gap = 0.127mm, Vertical Gap = 0.254mm ) ((HasFootprint('NY PMS 440 0025 PH'))),((HasFootprint('Keystone_1902C')))
Component Clearance Constraint: (Collision < 0.127mm) Between Small Component H1-NY PMS 440 0025 PH (54.86012mm,94.8mm) on Top Layer And SMT Small Component H5-1902C (55.2mm,95.1mm) on Top Layer
Waived by Ester Vicario at 6/28/2023 5:07:03 PM
Component Clearance Constraint: (Collision < 0.127mm) Between Small Component H2-NY PMS 440 0025 PH (190mm,94.1946mm) on Top Layer And SMT Small Component H6-1902C (190mm,94.1946mm) on Top Layer
Waived by Ester Vicario at 9/2/2022 2:38:39 PM
Component Clearance Constraint: (Collision < 0.127mm) Between Small Component H3-NY PMS 440 0025 PH (55.39633mm,-8.88745mm) on Top Layer And SMT Small Component H7-1902C (55.39633mm,-8.88745mm) on Top Layer
Waived by Martin Staebler at 8/1/2023 12:30:04 AM
Component Clearance Constraint: (Collision < 0.127mm) Between Small Component H4-NY PMS 440 0025 PH (192.1mm,-11.68429mm) on Top Layer And SMT Small Component H8-1902C (192.1mm,-11.68429mm) on Top Layer
Waived by Martin Staebler at 8/14/2023 11:09:56 PM

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