(NETLIST)
(FOR DRAWING: M:/pcb/cadence/ADC0xD1520/worklib/adc0xd1520rb_r1/physical/adc0xd1520rb_r1.brd)
(GENERATED BY: ALLEGRO 16.3 S004 (v16-3-85V))
(Fri Jul 27 16:29:28 2012)
$PACKAGES
0603 ! 'C-NON-POL_0603_4.7UF' ! '4.7uF' ; C282 
0603_TRIPAD ! 'RESISTOR_TRIPAD_0603_TRIPAD_0 (' ! '0 (mount B pos)' ; R20 
0603_TRIPAD ! RESISTOR_TRIPAD_0603_TRIPAD_0_1 ! '0 (mount A pos)' ; R38 
0603_TRIPAD ! RESISTOR_TRIPAD_0603_TRIPAD_NA ! NA ; R40 R83 
128TQFP ! 'CYPRESS CY7C64613-80NC_128TQFP_' ! 'Cypress CY7C68013A-128AXC' ; ,
        U2 
1812 ! 'CAPACITOR NON-POL_1812_10U' ! 10u ; C187 
BGA_668_27X27_1P0 ! 'XC4VLX25-11FFG668 _3_BGA_668_27' ! 'XC4VLX25-11FFG668' ,
        ; U5 
BLKCON_10X3 ! 'HEADER 10X3_BLKCON_10X3_HEADER' ! 'HEADER 10x3' ; J4 
BLKCON_2X1 ! 'HEADER 2_BLKCON_2X1_HEADER 2' ! 'HEADER 2' ; J162 J163 J164 ,
        J168 
BLKCON_2X1 ! 'HEADER 2_BLKCON_2X1_JUMPER1' ! JUMPER1 ; J155 J156 J167 
BLKCON_2X1 ! JUMPER1_BLKCON_2X1_JUMPER1 ! JUMPER1 ; J21 J22 J157 J158 J159 ,
        J160 J161 
BLKCON_2X2 ! 'HDR-2X2_BLKCON_2X2_HDR2X2' ! HDR2x2 ; J23 
BLKCON_3X1 ! 'HEADER 3_BLKCON_3X1_HEADER 3' ! 'HEADER 3' ; J13 J16 
BLKCON_3X2 ! 'HEADER 3X2_BLKCON_3X2_HEADER 3X' ! 'HEADER 3X2' ; J25 
BLKCON_3X2 ! JUMPER3_BLKCON_3X2_JUMPER3 ! JUMPER3 ; J14 
C0402 ! 'C-NON-POL_C0402_100N' ! 100n ; C1 C2 C3 C4 C5 C6 C7 C10 C18 C19 ,
        C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C81 C82 C83 C84 C85 C86 C87 ,
        C88 C89 C90 C91 C92 C93 C94 C95 C96 C97 C98 C99 C100 C101 C102 C103 ,
        C104 C105 C106 C107 C108 C109 C110 C111 C114 C115 C116 C117 C118 ,
        C119 C120 C121 C122 C123 C124 C125 C126 C127 C128 C129 C130 C131 ,
        C132 C133 C134 C135 C249 C250 C251 C252 C253 C254 C255 C256 C257 ,
        C258 C259 C260 C261 C262 C263 C264 C265 C271 
C0402 ! 'C-NON-POL_C0402_100P' ! 100p ; C75 C76 C77 C138 
C0402 ! 'CAPACITOR NON-POL_C0402_0.01U' ! '0.01u' ; C65 C175 C176 C186 C202 ,
        C205 C218 C220 C227 C234 C246 C266 
C0402 ! 'CAPACITOR NON-POL_C0402_0.022U' ! '0.022u' ; C189 
C0402 ! 'CAPACITOR NON-POL_C0402_0.1U' ! '0.1u' ; C164 C165 C167 C170 C181 ,
        C183 C184 C185 C188 C193 C195 C196 C197 C208 C210 C212 C214 C216 ,
        C219 C222 C224 C226 C229 C231 C233 C244 C267 
C0402 ! 'CAPACITOR NON-POL_C0402_0.22UF' ! '0.22uF' ; C161 
C0402 ! 'CAPACITOR NON-POL_C0402_100N' ! 100n ; C54 C55 C56 C57 C58 C59 C60 ,
        C61 C62 C66 C68 C201 C235 C238 
C0402 ! 'CAPACITOR NON-POL_C0402_100P' ! 100p ; C206 
C0402 ! 'CAPACITOR NON-POL_C0402_1U' ! 1u ; C177 C190 C191 
C0402 ! 'CAPACITOR NON-POL_C0402_2.2N' ! '2.2n' ; C236 
C0402_NO_SS ! 'C-NON-POL_C0402_NO_SS_4.7N' ! '4.7n' ; C150 C151 
C0603 ! 'C-NON-POL_C0603_100N' ! 100n ; C67 C74 C78 C136 C137 C162 C163 ,
        C166 C171 C172 C173 C174 
C0603 ! 'C-NON-POL_C0603_1800PF' ! 1800pF ; C247 
C0603 ! 'C-NON-POL_C0603_1UF' ! 1uF ; C240 
C0603 ! 'C-NON-POL_C0603_4.7NF' ! '4.7nF' ; C2_LF 
C0603 ! 'CAPACITOR NON-POL_C0603_1000PF' ! 1000pF ; C63 
C0603 ! 'CAPACITOR NON-POL_C0603_NA' ! NA ; C323 
C0805 ! 'C-POLARISED_C0805_10U' ! 10u ; C168 C169 C182 C209 C211 C215 C217 ,
        C223 C225 C230 C232 C239 C241 C242 C243 C285 C292 C296 C300 C304 
C0805 ! 'CAPACITOR NON-POL_C0805_0.1U' ! '0.1u' ; C159 
C0805 ! 'CAPACITOR NON-POL_C0805_10U' ! 10u ; C160 C180 C192 C198 C207 C213 ,
        C221 C228 C248 
C0805 ! 'CAPACITOR NON-POL_C0805_1U' ! 1u ; C237 
C0805 ! 'CAPACITOR NON-POL_C0805_22U' ! 22u ; C8 C9 
C10P3MMX10P3MM ! 'C-POLARISED_C10P3MMX10P3MM_270U' ! 270u ; C194 
C1206 ! 'CAPACITOR NON-POL_C1206_12PF' ! 12pF ; C70 C71 
C1206 ! 'CAPACITOR NON-POL_C1206_4.7N' ! '4.7n' ; C69 
C1210 ! 'CAPACITOR NON-POL_C1210_4.7U' ! '4.7u' ; C158 C274 C275 
C3216 ! 'C-POLARISED_C3216_2.2UF' ! '2.2uF' ; C64 
C6P6MMX6P6MM ! 'C-POLARISED_C6P6MMX6P6MM_100UF' ! 100uF ; C157 
'CHOKE_CM2545-B' ! 'INDUCTOR CM CHOKE_CHOKE_CM2545-' ! 'CM CHOKE' ; L9 
CONN_SEAM_040 ! 'ASP-134488-01_0_CONN_SEAM_040_A' ! 'ASP-134488-01_0' ; FMC 
'CVHD-950' ! 'CVHD-950_CVHD-950_CVHD-950-100.' ! 'CVHD-950-100.000' ; Y3 
CWX813 ! CWX813_CWX813_NA ! NA ; Y4 
DO214_AB ! 'DIODE SCHOTTKY_DO214_AB_DIODE S' ! 'DIODE SCHOTTKY' ; D2 D3 D4 
EIA_481 ! INDUCTOR_EIA_481_10UH ! 10uH ; L5 L6 L7 L10 
GRF303 ! 'GRF303_0_GRF303_GRF303-5' ! 'GRF303-5' ; U11 
HC49US ! 'CRYSTAL_HC49US_XTAL 24MHZ' ! 'XTAL 24MHz' ; Y1 
JACK_POWER ! 'CONN PWR JACK_JACK_POWER_CONN P' ! 'CONN PWR JACK' ; J12 
LLP14_P5MM_4X4_EP ! LM95233_LLP14_P5MM_4X4_EP_LM952 ! LM95233 ; U8 
OSC_100M_5X7 ! 'OSC-SM_OSC_100M_5X7_OSC 100MHZ' ! 'OSC 100MHz' ; Y2 
R0402_NO_SS ! 'C-NON-POL_R0402_NO_SS_0.056NF' ! '0.056nF' ; C1_LF 
R0402_NO_SS ! 'C-NON-POL_R0402_NO_SS_100N' ! 100n ; C268 C270 C272 C273 ,
        C276 C277 C279 C280 C283 C290 C294 C298 C302 C306 C307 C309 
R0402_NO_SS ! 'C-NON-POL_R0402_NO_SS_100P' ! 100p ; C289 C293 C297 C301 
R0402_NO_SS ! 'C-NON-POL_R0402_NO_SS_1UF' ! 1uF ; C269 C281 C284 C291 C295 ,
        C299 C303 
R0402_NO_SS ! 'C-NON-POL_R0402_NO_SS_4.7UF' ! '4.7uF' ; C305 C308 
R0402_NO_SS ! 'C-NON-POL_R0402_NO_SS_470P' ! 470p ; C141 
R0402_NO_SS ! RESISTOR_R0402_NO_SS_0 ! 0 ; R65 R158 R159 R175 
R0402_NO_SS ! RESISTOR_R0402_NO_SS_10 ! 10 ; R173 R190 
R0402_NO_SS ! RESISTOR_R0402_NO_SS_100K ! 100K ; R194 R195 
R0402_NO_SS ! RESISTOR_R0402_NO_SS_18 ! 18 ; R177 R192 
R0402_NO_SS ! RESISTOR_R0402_NO_SS_1K ! 1k ; R183 R197 R198 R200 R201 R203 ,
        R204 R206 R207 
R0402_NO_SS ! RESISTOR_R0402_NO_SS_330 ! 330 ; R178 R179 
R0402_NO_SS ! 'RESISTOR_R0402_NO_SS_4.7' ! '4.7' ; R169 R174 
R0402_NO_SS ! 'RESISTOR_R0402_NO_SS_40.2' ! '40.2' ; R191 
R0402_NO_SS ! 'RESISTOR_R0402_NO_SS_49.9' ! '49.9' ; R184 R185 
R0402_NO_SS ! 'RESISTOR_R0402_NO_SS_49.9K' ! '49.9k' ; R186 
R0402_NO_SS ! RESISTOR_R0402_NO_SS_51 ! 51 ; R196 
R0402_NO_SS ! RESISTOR_R0402_NO_SS_560 ! 560 ; R2_LF 
R0402_NO_SS ! RESISTOR_R0402_NO_SS_68 ! 68 ; R193 
R0402_NO_SS ! RESISTOR_R0402_NO_SS_NA ! NA ; R157 R160 R163 R165 
R0603 ! 'INDUCTOR FERRITE/SM_1_R0603_IND' ! 'INDUCTOR FERRITE/SM' ; L2 L3 ,
        L4 L8 L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 L21 
R0603 ! RESISTOR_R0603_0 ! 0 ; R22 R31 R43 R126 R168 
R0603 ! 'RESISTOR_R0603_1.3K' ! '1.3k' ; R109 
R0603 ! 'RESISTOR_R0603_1.8K' ! '1.8k' ; R98 
R0603 ! RESISTOR_R0603_10 ! 10 ; R82 
R0603 ! RESISTOR_R0603_100 ! 100 ; R30 R39 R41 R42 R199 R202 R205 R208 
R0603 ! RESISTOR_R0603_10K ! 10k ; R23 R32 R33 R35 R36 R37 R59 R80 R86 R87 ,
        R104 R106 R107 R155 R156 
R0603 ! 'RESISTOR_R0603_12.1K' ! '12.1k' ; R93 
R0603 ! RESISTOR_R0603_120 ! 120 ; R164 
R0603 ! RESISTOR_R0603_15K ! 15k ; R94 
R0603 ! 'RESISTOR_R0603_18.7K' ! '18.7k' ; R91 
R0603 ! RESISTOR_R0603_1K ! 1k ; R26 R28 R44 R45 R56 R58 R111 R113 R117 ,
        R124 
R0603 ! 'RESISTOR_R0603_2.2K' ! '2.2K' ; R97 
R0603 ! 'RESISTOR_R0603_2.32K' ! '2.32k' ; R149 
R0603 ! 'RESISTOR_R0603_2.37K' ! '2.37k' ; R125 
R0603 ! 'RESISTOR_R0603_2.4K' ! '2.4k' ; R112 R118 
R0603 ! RESISTOR_R0603_205K ! 205k ; R92 
R0603 ! RESISTOR_R0603_20K ! 20k ; R108 
R0603 ! RESISTOR_R0603_22K ! 22k ; R120 R121 R122 
R0603 ! 'RESISTOR_R0603_26.7K' ! '26.7k' ; R88 
R0603 ! 'RESISTOR_R0603_3.3K' ! '3.3k' ; R12 R85 
R0603 ! RESISTOR_R0603_30K ! 30k ; R95 
R0603 ! RESISTOR_R0603_33 ! 33 ; R53 R134 R136 
R0603 ! RESISTOR_R0603_330 ! 330 ; R29 R47 R48 R49 R50 R52 R54 R55 R142 
R0603 ! 'RESISTOR_R0603_4.3K' ! '4.3K' ; R79 
R0603 ! 'RESISTOR_R0603_4.7K' ! '4.7K' ; R15 R34 
R0603 ! 'RESISTOR_R0603_47.5K' ! '47.5k' ; R103 
R0603 ! 'RESISTOR_R0603_49.9' ! '49.9' ; R4 R9 R13 R14 R16 R17 R25 R128 ,
        R180 R181 R182 R187 R188 R189 
R0603 ! 'RESISTOR_R0603_5.1K' ! '5.1k' ; R96 R110 
R0603 ! 'RESISTOR_R0603_5.9K' ! '5.9k' ; R89 R90 
R0603 ! RESISTOR_R0603_510 ! 510 ; R46 R114 
R0603 ! RESISTOR_R0603_806 ! 806 ; R150 
R0603 ! 'RESISTOR_R0603_95.3' ! '95.3' ; R135 R137 
R0603 ! RESISTOR_R0603_NA ! NA ; R81 R84 R105 
R1206 ! 'CHOKE_R1206_100MHZ CHOKE' ! '100MHz CHOKE' ; L1 
R1206 ! LED_SNGLE_PANEL_R1206_GREEN ! GREEN ; ADC_CALIBRATION ADC_POWER ,
        DCLK_LOCKED ECM_ENABLED FPGA_OPERATIONAL LD10 LD11 'OVER-RANGE' ,
        PLL_LD TRIGGER_ARMED 
R1206 ! RESISTOR_R1206_0 ! 0 ; R1 R2 
R1206 ! 'RESISTOR_R1206_1.2K' ! '1.2K' ; R99 
R1206 ! RESISTOR_R1206_1M ! 1M ; R24 
R1206 ! 'RESISTOR_R1206_2.2K' ! '2.2K' ; R19 R21 
R1206 ! RESISTOR_R1206_47K ! 47K ; R18 
RF_SMA_END_LAUNCH ! 'SMA-3_0_RF_SMA_END_LAUNCH_DO NO' ! 'Do Not Populate' ; ,
        J27 J28 J29 J30 J31 J32 
RF_SMA_END_LAUNCH ! 'SMA-3_0_RF_SMA_END_LAUNCH_SMA-3' ! 'sma-3' ; ,
        'DCLK_RST-' 'DCLK_RST/DCLK_RST+' J11 J26 'VINI+' 'VINI-' 'VINQ+' ,
        'VINQ-' 
'SC-MKT-MF05A' ! 'LP2992IM5-5.0_SC-MKT-MF05A_LP29' ! 'LP2992IM5-5.0' ; U24 
'SC-MKT-SQA36A' ! 'LMX2541SQ_SC-MKT-SQA36A_LMX2541' ! LMX2541SQ3030E ; U26 
'SC-MKT-TJ5A' ! 'LP38513-ADJ_SC-MKT-TJ5A_LP38513' ! 'LP38513-ADJ' ; U17 
'SC_MKT-VNX128A' ! 'ADC08D1520_SC_MKT-VNX128A_ADC0X' ! ADC0xD1520 ; U9 
SHDR6X1 ! 'CONN 6 PIN SINGLE ROW_SHDR6X1_C' ! 'CONN 6 PIN SINGLE ROW' ; J6 
SMA_V_CLR ! SMA_CONN_2_SMA_V_CLR_SMA_CONN_2 ! SMA_CONN_2 ; 'OR+/DCLK2+' ,
        'OR-/DCLK2-' 
SM_7PIN_FTR ! 2MM_7PIN_HEADER_SM_7PIN_FTR_DO ! 'Do Not Populate' ; U6 U7 
SM_JUMPER ! JUMPER/SM/SMALL_SM_JUMPER_JUMPE ! jumper/sm/small ; J36 J37 
SOD_123_21 ! 'DIODE SCHOTTKY_SOD_123_21_DIODE' ! 'DIODE SCHOTTKY' ; D1 D5 
SOIC6_026_WG049_L079 ! 'TRANSFORMER AIR CORE_0_SOIC6_02' ,
        ! 'TRANSFORMER AIR CORE_0' ; T1 
SOIC8 ! 24C02/SO8_0_SOIC8_24C02 ! 24C02 ; U4 
SOIC8_050_WG244_L200_EP ! LP3878SD_SOIC8_050_WG244_L200_E ! LP3878SD ; U15 ,
        U18 U19 U20 U22 
'SOT-23' ! 'BSS138/SOT_SOT-23_BSS138/SOT' ! BSS138/SOT ; Q2 
'SOT-23' ! 'TRANSISTOR NPN BC817 SMD_0_SOT-' ! 'BC817-25' ; Q1 
'SOT23-STX' ! 'LM3722_SOT23-STX_LM3724' ! LM3724 ; U3 
SOT_23_6 ! LM3880_SOT_23_6_LM3880 ! LM3880 ; U21 
SW_2P_6X3P5 ! 'SW KEY-SPST_SW_2P_6X3P5_RESET' ! RESET ; SW1 
SW_TH_RA_7101 ! 'SW-DPST-2P_SW_TH_RA_7101_ROCKER' ! ROCKER ; SW2 
TH_10_HDR2X5_M_STR_100 ! 'CONN 10 PIN 2MM SMT DUAL ROW_TH' ! 'CONN 10 PIN' ,
        ; J15 J17 J18 J44 
TH_2_HDR1X2_M_STR_100 ! 'JUMPER 2X1_TH_2_HDR1X2_M_STR_10' ! 'JUMPER 2X1' ; ,
        J20 
TP40 ! 'TEST POINT_TP40_TP' ! TP ; TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 ,
        TP14 TP15 TP16 TP17 TP18 TP19 TP20 TP21 
TP_SMD_S35X28 ! 'TEST POINT_TP_SMD_S35X28_TP_CY_' ! TP_CY_CLK ; TP2 
TSSOP16_65M_WG6P4_L5 ! LM26400_TSSOP16_65M_WG6P4_L5_LM ! LM26400 ; U13 
TSSOP20_65M_WG6P4_L6P5_EP ! LM20242_TSSOP20_65M_WG6P4_L6P5_ ! LM20242 ; U23 
TSSOP20_65M_WG6P4_L6P5_EP ! LM25576_TSSOP20_65M_WG6P4_L6P5_ ! LM25576 ; U16 
TSSOP48_50M_WG20_L12 ! XCF08P_VO48_0_TSSOP48_50M_WG20_ ! 'XCF08P_VO48 N/A' ,
        ; U14 
TSSOP8_65M_WG4P9_L3 ! MC10EP16_TSSOP8_65M_WG4P9_L3_MC ! MC100EP16 ; U25 
'USB-JACK-B' ! 'USB-B_0_USB-JACK-B_USB-B' ! 'USB-B' ; J2 
VIA85D55 ! 'TEST POINT_VIA85D55_HOLE' ! Hole ; FMC1 FMC2 MT1 MT2 MT3 MT4 ,
        MT5 
$NETS
1V2VCC_INT ; C128.1 C129.1 C130.1 C131.1 C132.1 C133.1 C134.1 C135.1 C184.1 ,
        C243.1 C253.2 L8.2 U5.J10 U5.J11 U5.J16 U5.J17 U5.K9 U5.K10 U5.K17 ,
        U5.K18 U5.L9 U5.L10 U5.L11 U5.L16 U5.L17 U5.L18 U5.M12 U5.M15 ,
        U5.R12 U5.R15 U5.T9 U5.T10 U5.T11 U5.T16 U5.T17 U5.T18 U5.U9 U5.U10 ,
        U5.U17 U5.U18 U5.V10 U5.V11 U5.V16 U5.V17 
1V8IO ; C102.1 C103.1 C104.1 C105.1 C106.1 C107.1 C162.1 C163.1 C182.1 ,
        C183.1 C185.2 C253.1 C254.2 C255.2 C256.2 C271.2 J4.1 J4.4 J4.7 ,
        J4.10 J4.13 J4.16 J4.19 J4.22 J4.25 J4.28 R98.1 R188.2 U5.AA22 ,
        U5.AA25 U5.AB19 U5.AE19 U5.AE22 U5.V19 U5.W17 U5.W18 U14.4 U14.15 ,
        U14.34 U15.5 
1V9A ; C242.1 C244.1 C323.1 J23.1 J23.3 J36.1 J37.1 J44.1 L14.2 R58.1 ,
        R197.1 R200.1 R203.1 R207.1 
1V9AC ; C1.1 C2.1 C3.1 C4.1 C5.1 C6.1 C7.1 C8.1 C27.1 C28.1 C29.1 J167.2 ,
        R1.2 U9.2 U9.5 U9.8 U9.13 U9.16 U9.17 U9.20 U9.25 U9.28 U9.33 ,
        U9.128 
1V9DR ; C9.1 C18.1 C19.1 C20.1 C21.1 C22.1 C23.1 C24.1 C25.1 C26.1 C254.1 ,
        C255.1 C256.1 C271.1 R2.2 U9.40 U9.51 U9.62 U9.73 U9.88 U9.99 ,
        U9.110 U9.121 
2V45IO ; C196.1 C198.1 L2.2 U17.2 
2V45IO_PRE ; C194.1 C195.1 L2.1 L10.2 R105.1 R106.1 U16.12 
2V5IO ; C10.1 C82.1 C83.1 C84.1 C85.1 C86.1 C87.1 C89.1 C90.1 C91.1 C92.1 ,
        C93.1 C99.1 C114.1 C115.1 C116.1 C117.1 C118.1 C119.1 C120.1 C121.1 ,
        C122.1 C123.1 C124.1 C125.1 C126.1 C127.1 C169.1 C170.1 C180.1 ,
        C181.1 C249.2 C250.2 C251.2 C252.2 C257.1 C258.1 C259.1 C260.1 ,
        J155.2 J156.2 L6.2 R32.1 R33.1 R35.1 R36.1 R37.1 R86.1 R87.1 R91.1 ,
        R104.1 U5.AB11 U5.AB16 U5.AF17 U5.B11 U5.B16 U5.B19 U5.B22 U5.E11 ,
        U5.E16 U5.E19 U5.F22 U5.F25 U5.H11 U5.H16 U5.H17 U5.H18 U5.H19 ,
        U5.J12 U5.J19 U5.K8 U5.K19 U5.L2 U5.L5 U5.L22 U5.L25 U5.M9 U5.M18 ,
        U5.N1 U5.N9 U5.N18 U5.P9 U5.P18 U5.P26 U5.R9 U5.R18 U5.T2 U5.T5 ,
        U5.T22 U5.T25 U5.U8 U5.U19 U5.V15 U5.W10 U5.W11 U5.W16 U15.4 U15.8 
3V3IO ; C74.1 C78.1 C81.1 C88.1 C94.1 C95.1 C96.1 C97.1 C98.1 C100.1 C101.1 ,
        C108.1 C109.1 C110.1 C111.1 C166.1 C167.1 C168.1 C171.1 C172.1 ,
        C173.1 C174.1 C249.1 C250.1 C251.1 C252.1 C261.1 C262.1 C263.1 ,
        C264.1 C265.1 J6.1 L5.1 R29.1 R34.1 R38.1 R40.1 R47.2 R48.2 R49.2 ,
        R50.2 R52.2 R54.2 R55.2 R81.1 R85.1 R88.1 U5.AA2 U5.AA5 U5.AB8 ,
        U5.AD15 U5.AE5 U5.AE8 U5.AE11 U5.B5 U5.B8 U5.E8 U5.F2 U5.F5 U5.H9 ,
        U5.H10 U5.J8 U5.J15 U5.V8 U5.V12 U5.W8 U5.W9 U14.8 U14.24 U14.30 ,
        U14.38 U14.45 Y2.4 
3V3PLL ; C231.1 C232.1 C273.1 C289.2 C290.1 C291.1 C292.1 C293.2 C294.1 ,
        C295.1 C296.1 C297.2 C298.1 C299.1 C300.1 C301.2 C302.1 C303.1 ,
        C304.1 L13.2 L16.2 L19.1 L21.2 R65.1 R163.1 R175.2 TP12.1 U26.3 ,
        U26.7 U26.29 U26.31 
3V3PLL_2 ; C283.1 C284.1 C285.1 L15.2 L17.2 L18.2 L20.2 R175.1 TP21.1 
3V3PLL_AUX ; C137.2 C138.2 C240.1 R65.2 R164.1 R190.1 R194.1 TP13.1 
3V3USB ; C54.1 C55.1 C56.1 C57.1 C58.1 C59.1 C60.1 C61.1 C62.1 C63.1 C67.1 ,
        C68.1 C216.1 C217.1 L1.2 L11.2 R15.2 R18.1 R19.2 R20.1 R21.2 R142.2 ,
        U2.2 U2.26 U2.43 U2.48 U2.64 U2.68 U2.81 U2.100 U2.101 U2.107 U3.5 ,
        U4.8 
3V3USI1 ; C77.1 C136.1 C224.1 C225.1 C241.1 C246.1 J13.3 L12.2 U8.2 U25.8 
5V0USI1 ; C141.1 C210.1 C211.1 C221.1 C222.1 J13.1 L3.2 U11.1 U17.1 U20.4 
ADC_PWR ; R58.2 R59.1 U5.AC24 
'ADC_TDIODE+' ; C76.2 U8.7 U9.34 
'ADC_TDIODE-' ; C75.1 C76.1 U5.G13 U8.5 U9.35 
CAL ; J4.29 R56.2 R128.1 
CALDLY/DES ; J4.11 R26.2 R180.1 
CALRUN ; U5.AF23 U9.126 
'CLK+' ; C150.2 U9.18 
'CLK-' ; C151.2 U9.19 
CONF_CCLK ; R17.2 R31.1 R81.2 R83.2 R84.1 
CONF_DIN ; U2.78 U5.G12 U14.28 
CONF_DONE ; R29.2 U2.115 U5.H14 U14.13 
CONF_INITB ; R34.2 U2.79 U5.G15 U14.11 
CS_N ; U2.42 U5.AF7 
CY_ADDR0 ; U2.94 U5.W2 
CY_ADDR1 ; U2.95 U5.W1 
CY_ADDR2 ; U2.96 U5.V6 
CY_ADDR3 ; U2.97 U5.V5 
CY_ADDR4 ; U2.117 U5.W7 
CY_ADDR5 ; U2.118 U5.V7 
CY_ADDR6 ; U2.119 U5.W4 
CY_ADDR7 ; U2.120 U5.W3 
CY_ADDR8 ; U2.126 U5.W6 
CY_ADDR9 ; U2.127 U5.W5 
CY_ADDR10 ; U2.128 U5.Y2 
CY_ADDR11 ; U2.21 U5.Y1 
CY_ADDR12 ; U2.22 U5.AA4 
CY_ADDR13 ; U2.23 U5.AA3 
CY_ADDR14 ; U2.24 U5.Y4 
CY_ADDR15 ; U2.25 U5.Y3 
CY_CTL3 ; U2.66 U5.AE14 
CY_CTL4 ; U2.67 U5.AE13 
CY_CTL5 ; U2.98 U5.AE10 
CY_DATA0 ; U2.59 U5.AF4 
CY_DATA1 ; U2.60 U5.AE4 
CY_DATA2 ; U2.61 U5.AD3 
CY_DATA3 ; U2.62 U5.AC3 
CY_DATA4 ; U2.63 U5.AF6 
CY_DATA5 ; U2.86 U5.AF5 
CY_DATA6 ; U2.87 U5.AA7 
CY_DATA7 ; U2.88 U5.Y7 
CY_FD0 ; U2.44 U5.Y6 
CY_FD1 ; U2.45 U5.Y5 
CY_FD2 ; U2.46 U5.AB1 
CY_FD3 ; U2.47 U5.AA1 
CY_FD4 ; U2.54 U5.AC4 
CY_FD5 ; U2.55 U5.AB4 
CY_FD6 ; U2.56 U5.AB3 
CY_FD7 ; U2.57 U5.AB2 
CY_FD8 ; U2.102 U5.AC5 
CY_FD9 ; U2.103 U5.AB5 
CY_FD10 ; U2.104 U5.AC2 
CY_FD11 ; U2.105 U5.AC1 
CY_FD12 ; U2.121 U5.AF3 
CY_FD13 ; U2.122 U5.AE3 
CY_FD14 ; U2.123 U5.AD2 
CY_FD15 ; U2.124 U5.AD1 
CY_ID0 ; U2.72 U5.AA9 
CY_ID1 ; U2.73 U5.Y9 
CY_ID2 ; U2.74 U5.AD5 
CY_ID3 ; U2.75 U5.AD4 
CY_REQ ; R13.2 U5.AB7 
CY_VALID ; U2.114 U5.AC9 
'DCLK+' ; U5.A16 U9.82 
'DCLK-' ; U5.A15 U9.81 
'DCLK_RST+' ; 'DCLK_RST/DCLK_RST+'.3 R185.2 R186.1 U9.15 
'DCLK_RST-' ; 'DCLK_RST-'.3 J16.2 R183.2 R184.2 U9.14 
'DI+0' ; R205.2 R207.2 U5.N23 U9.103 
'DI+1' ; U5.M21 U9.101 
'DI+2' ; U5.M23 U9.96 
'DI+3' ; U5.M25 U9.94 
'DI+4' ; U5.L21 U9.92 
'DI+5' ; U5.L24 U9.90 
'DI+6' ; U5.L26 U9.86 
'DI+7' ; U5.K22 U9.84 
'DI-0' ; R205.1 R206.1 U5.N22 U9.102 
'DI-1' ; U5.M20 U9.100 
'DI-2' ; U5.M22 U9.95 
'DI-3' ; U5.M24 U9.93 
'DI-4' ; U5.L20 U9.91 
'DI-5' ; U5.L23 U9.89 
'DI-6' ; U5.M26 U9.85 
'DI-7' ; U5.K21 U9.83 
'DID+0' ; R197.2 R208.2 U5.V26 U9.125 
'DID+1' ; U5.U25 U9.123 
'DID+2' ; U5.T21 U9.118 
'DID+3' ; U5.T24 U9.116 
'DID+4' ; U5.T26 U9.114 
'DID+5' ; U5.R22 U9.112 
'DID+6' ; U5.R24 U9.107 
'DID+7' ; U5.R26 U9.105 
'DID-0' ; R198.1 R208.1 U5.V25 U9.124 
'DID-1' ; U5.U24 U9.122 
'DID-2' ; U5.T20 U9.117 
'DID-3' ; U5.T23 U9.115 
'DID-4' ; U5.U26 U9.113 
'DID-5' ; U5.R21 U9.111 
'DID-6' ; U5.R23 U9.106 
'DID-7' ; U5.R25 U9.104 
'DQ+0' ; R199.2 R200.2 U5.D26 U9.58 
'DQ+1' ; U5.F20 U9.60 
'DQ+2' ; U5.E23 U9.65 
'DQ+3' ; U5.E25 U9.67 
'DQ+4' ; U5.G19 U9.69 
'DQ+5' ; U5.F24 U9.71 
'DQ+6' ; U5.F26 U9.75 
'DQ+7' ; U5.G22 U9.77 
'DQ-0' ; R199.1 R201.1 U5.D25 U9.59 
'DQ-1' ; U5.E20 U9.61 
'DQ-2' ; U5.E22 U9.66 
'DQ-3' ; U5.E24 U9.68 
'DQ-4' ; U5.F19 U9.70 
'DQ-5' ; U5.F23 U9.72 
'DQ-6' ; U5.E26 U9.76 
'DQ-7' ; U5.G21 U9.78 
'DQD+0' ; R202.2 R203.2 U5.A20 U9.36 
'DQD+1' ; U5.A22 U9.38 
'DQD+2' ; U5.A24 U9.43 
'DQD+3' ; U5.B24 U9.45 
'DQD+4' ; U5.C20 U9.47 
'DQD+5' ; U5.C21 U9.49 
'DQD+6' ; U5.C26 U9.54 
'DQD+7' ; U5.D20 U9.56 
'DQD-0' ; R202.1 R204.1 U5.A19 U9.37 
'DQD-1' ; U5.A21 U9.39 
'DQD-2' ; U5.A23 U9.44 
'DQD-3' ; U5.B23 U9.46 
'DQD-4' ; U5.B20 U9.48 
'DQD-5' ; U5.B21 U9.50 
'DQD-6' ; U5.C25 U9.55 
'DQD-7' ; U5.D19 U9.57 
DRST_SEL ; J4.23 R114.2 R187.1 
ECE ; J4.8 R4.1 R46.2 
ENABLE1 ; J14.2 R96.2 R120.1 U23.19 
ENABLE2 ; J14.4 R121.1 U16.2 
ENABLE3 ; J14.6 R122.1 U18.8 U20.8 U22.8 
ENABLE26400 ; C177.1 R96.1 U13.3 U13.6 
EXT_CLK_SELECT ; R79.1 TP20.1 U5.AD7 
'EXT_TRIG+' ; R136.2 R137.1 U5.G18 
'EXT_TRIG-' ; R134.2 R135.1 U5.G17 
FIFOADR0 ; U2.89 U5.AC6 
FIFOADR1 ; U2.90 U5.AB6 
FLAGA ; U2.69 U5.Y10 
FLAGB ; U2.70 U5.AA10 
FLAGC ; U2.71 U5.AC7 
FLASH_TDO ; R43.2 U5.Y12 U14.22 
FMC_CALRUN ; FMC.G18 U5.H6 
'FMC_DCLK_DI+' ; FMC.D20 U5.J2 
'FMC_DCLK_DI-' ; FMC.D21 U5.J1 
'FMC_DCLK_DID+' ; FMC.G6 U5.P8 
'FMC_DCLK_DID-' ; FMC.G7 U5.N8 
'FMC_DCLK_DQ+' ; FMC.K25 U5.H2 
'FMC_DCLK_DQ-' ; FMC.K26 U5.H1 
'FMC_DCLK_DQD+' ; FMC.F4 U5.A9 
'FMC_DCLK_DQD-' ; FMC.F5 U5.B9 
'FMC_DI+0' ; FMC.C22 U5.N7 
'FMC_DI+1' ; FMC.H22 U5.M6 
'FMC_DI+2' ; FMC.G21 U5.N5 
'FMC_DI+3' ; FMC.H25 U5.M4 
'FMC_DI+4' ; FMC.G24 U5.N3 
'FMC_DI+5' ; FMC.D23 U5.M2 
'FMC_DI+6' ; FMC.H28 U5.L7 
'FMC_DI+7' ; FMC.G27 U5.K7 
'FMC_DI+8' ; FMC.D26 U5.K5 
'FMC_DI+9' ; FMC.C26 U5.J5 
'FMC_DI+10' ; FMC.H31 U5.L1 
'FMC_DI+11' ; FMC.G30 U5.K3 
'FMC_DI-0' ; FMC.C23 U5.M7 
'FMC_DI-1' ; FMC.H23 U5.M5 
'FMC_DI-2' ; FMC.G22 U5.N4 
'FMC_DI-3' ; FMC.H26 U5.M3 
'FMC_DI-4' ; FMC.G25 U5.N2 
'FMC_DI-5' ; FMC.D24 U5.M1 
'FMC_DI-6' ; FMC.H29 U5.L6 
'FMC_DI-7' ; FMC.G28 U5.K6 
'FMC_DI-8' ; FMC.D27 U5.K4 
'FMC_DI-9' ; FMC.C27 U5.J4 
'FMC_DI-10' ; FMC.H32 U5.K1 
'FMC_DI-11' ; FMC.G31 U5.K2 
'FMC_DID+0' ; FMC.D8 U5.T8 
'FMC_DID+1' ; FMC.H7 U5.T7 
'FMC_DID+2' ; FMC.G9 U5.U6 
'FMC_DID+3' ; FMC.H10 U5.V4 
'FMC_DID+4' ; FMC.D11 U5.T4 
'FMC_DID+5' ; FMC.C10 U5.U3 
'FMC_DID+6' ; FMC.H13 U5.V2 
'FMC_DID+7' ; FMC.G12 U5.P7 
'FMC_DID+8' ; FMC.D14 U5.R4 
'FMC_DID+9' ; FMC.C14 U5.R2 
'FMC_DID+10' ; FMC.H16 U5.P5 
'FMC_DID+11' ; FMC.G15 U5.P3 
'FMC_DID-0' ; FMC.D9 U5.U7 
'FMC_DID-1' ; FMC.H8 U5.T6 
'FMC_DID-2' ; FMC.G10 U5.U5 
'FMC_DID-3' ; FMC.H11 U5.U4 
'FMC_DID-4' ; FMC.D12 U5.T3 
'FMC_DID-5' ; FMC.C11 U5.U2 
'FMC_DID-6' ; FMC.H14 U5.V1 
'FMC_DID-7' ; FMC.G13 U5.P6 
'FMC_DID-8' ; FMC.D15 U5.R3 
'FMC_DID-9' ; FMC.C15 U5.R1 
'FMC_DID-10' ; FMC.H17 U5.P4 
'FMC_DID-11' ; FMC.G16 U5.P2 
'FMC_DQ+0' ; FMC.J24 U5.C4 
'FMC_DQ+1' ; FMC.F22 U5.C5 
'FMC_DQ+2' ; FMC.E21 U5.E6 
'FMC_DQ+3' ; FMC.F25 U5.G6 
'FMC_DQ+4' ; FMC.E24 U5.D3 
'FMC_DQ+5' ; FMC.K28 U5.C2 
'FMC_DQ+6' ; FMC.J27 U5.F4 
'FMC_DQ+7' ; FMC.F28 U5.G4 
'FMC_DQ+8' ; FMC.E27 U5.E1 
'FMC_DQ+9' ; FMC.K31 U5.D10 
'FMC_DQ+10' ; FMC.J30 U5.G2 
'FMC_DQ+11' ; FMC.F31 U5.H4 
'FMC_DQ-0' ; FMC.J25 U5.D4 
'FMC_DQ-1' ; FMC.F23 U5.D5 
'FMC_DQ-2' ; FMC.E22 U5.E5 
'FMC_DQ-3' ; FMC.F26 U5.G5 
'FMC_DQ-4' ; FMC.E25 U5.E4 
'FMC_DQ-5' ; FMC.K29 U5.C1 
'FMC_DQ-6' ; FMC.J28 U5.F3 
'FMC_DQ-7' ; FMC.F29 U5.G3 
'FMC_DQ-8' ; FMC.E28 U5.F1 
'FMC_DQ-9' ; FMC.K32 U5.C10 
'FMC_DQ-10' ; FMC.J31 U5.G1 
'FMC_DQ-11' ; FMC.F32 U5.H3 
'FMC_DQD+0' ; FMC.E2 U5.F10 
'FMC_DQD+1' ; FMC.K7 U5.E9 
'FMC_DQD+2' ; FMC.J6 U5.F8 
'FMC_DQD+3' ; FMC.F7 U5.D9 
'FMC_DQD+4' ; FMC.E6 U5.D8 
'FMC_DQD+5' ; FMC.K10 U5.B7 
'FMC_DQD+6' ; FMC.J9 U5.A8 
'FMC_DQD+7' ; FMC.F10 U5.F7 
'FMC_DQD+8' ; FMC.E9 U5.E7 
'FMC_DQD+9' ; FMC.K13 U5.A6 
'FMC_DQD+10' ; FMC.J12 U5.A4 
'FMC_DQD+11' ; FMC.F13 U5.A3 
'FMC_DQD-0' ; FMC.E3 U5.E10 
'FMC_DQD-1' ; FMC.K8 U5.F9 
'FMC_DQD-2' ; FMC.J7 U5.G8 
'FMC_DQD-3' ; FMC.F8 U5.C8 
'FMC_DQD-4' ; FMC.E7 U5.D7 
'FMC_DQD-5' ; FMC.K11 U5.C7 
'FMC_DQD-6' ; FMC.J10 U5.A7 
'FMC_DQD-7' ; FMC.F11 U5.G7 
'FMC_DQD-8' ; FMC.E10 U5.D6 
'FMC_DQD-9' ; FMC.K14 U5.A5 
'FMC_DQD-10' ; FMC.J13 U5.B4 
'FMC_DQD-11' ; FMC.F14 U5.B3 
'FMC_ORI+' ; FMC.H34 U5.J7 
'FMC_ORI-' ; FMC.H35 U5.J6 
'FMC_ORQ+' ; FMC.E30 U5.H8 
'FMC_ORQ-' ; FMC.E31 U5.H7 
FMC_PG_C2M ; FMC.D1 J155.1 R155.2 U5.R5 
FMC_PG_M2C ; FMC.F1 J156.1 R156.1 U5.R6 
'FMC_RCOUT1+' ; FMC.C18 U5.U23 
'FMC_RCOUT1-' ; FMC.C19 U5.V23 
'FMC_RCOUT2+' ; FMC.H19 U5.U22 
'FMC_RCOUT2-' ; FMC.H20 U5.U21 
FPGA_RESET ; R15.1 R16.2 U5.AF8 
FSR/ALT_ECE ; R183.1 U5.Y17 
GND ; C1.2 C2.2 C3.2 C4.2 C5.2 C6.2 C7.2 C8.2 C9.2 C10.2 C18.2 C19.2 C20.2 ,
        C21.2 C22.2 C23.2 C24.2 C25.2 C26.2 C27.2 C28.2 C29.2 C54.2 C55.2 ,
        C56.2 C57.2 C58.2 C59.2 C60.2 C61.2 C62.2 C63.2 C64.2 C65.2 C66.2 ,
        C67.2 C68.2 C69.1 C70.2 C71.2 C74.2 C77.2 C78.2 C81.2 C82.2 C83.2 ,
        C84.2 C85.2 C86.2 C87.2 C88.2 C89.2 C90.2 C91.2 C92.2 C93.2 C94.2 ,
        C95.2 C96.2 C97.2 C98.2 C99.2 C100.2 C101.2 C102.2 C103.2 C104.2 ,
        C105.2 C106.2 C107.2 C108.2 C109.2 C110.2 C111.2 C114.2 C115.2 ,
        C116.2 C117.2 C118.2 C119.2 C120.2 C121.2 C122.2 C123.2 C124.2 ,
        C125.2 C126.2 C127.2 C128.2 C129.2 C130.2 C131.2 C132.2 C133.2 ,
        C134.2 C135.2 C136.2 C137.1 C138.1 C141.2 C157.2 C158.2 C159.2 ,
        C160.2 C161.2 C162.2 C163.2 C166.2 C167.2 C168.2 C169.2 C170.2 ,
        C171.2 C172.2 C173.2 C174.2 C175.2 C176.2 C177.2 C180.2 C181.2 ,
        C182.2 C183.2 C184.2 C186.2 C187.2 C188.1 C190.2 C192.2 C193.2 ,
        C194.2 C195.2 C196.2 C197.2 C198.2 C201.2 C205.2 C206.2 C207.2 ,
        C208.2 C209.2 C210.2 C211.2 C213.2 C214.2 C215.2 C216.2 C217.2 ,
        C218.2 C220.2 C221.2 C222.2 C223.2 C224.2 C225.2 C227.2 C228.2 ,
        C229.2 C230.2 C231.2 C232.2 C234.2 C235.2 C236.2 C237.2 C239.2 ,
        C240.2 C241.2 C242.2 C243.2 C244.2 C246.2 C248.2 C257.2 C258.2 ,
        C259.2 C260.2 C261.2 C262.2 C263.2 C264.2 C265.2 C266.2 C267.2 ,
        C268.2 C269.2 C270.2 C272.2 C274.2 C275.2 C276.2 C277.2 C280.2 ,
        C281.2 C282.2 C283.2 C284.2 C285.2 C289.1 C290.2 C291.2 C292.2 ,
        C293.1 C294.2 C295.2 C296.2 C297.1 C298.2 C299.2 C300.2 C301.1 ,
        C302.2 C303.2 C304.2 C305.2 C308.2 C323.2 C1_LF.2 D1.1 D2.1 D3.1 ,
        D5.1 'DCLK_RST-'.1 'DCLK_RST-'.2 'DCLK_RST/DCLK_RST+'.1 ,
        'DCLK_RST/DCLK_RST+'.2 FMC.A1 FMC.A4 FMC.A5 FMC.A8 FMC.A9 FMC.A12 ,
        FMC.A13 FMC.A16 FMC.A17 FMC.A20 FMC.A21 FMC.A24 FMC.A25 FMC.A28 ,
        FMC.A29 FMC.A32 FMC.A33 FMC.A36 FMC.A37 FMC.A40 FMC.B2 FMC.B3 ,
        FMC.B6 FMC.B7 FMC.B10 FMC.B11 FMC.B14 FMC.B15 FMC.B18 FMC.B19 ,
        FMC.B22 FMC.B23 FMC.B26 FMC.B27 FMC.B30 FMC.B31 FMC.B34 FMC.B35 ,
        FMC.B38 FMC.B39 FMC.C1 FMC.C4 FMC.C5 FMC.C8 FMC.C9 FMC.C12 FMC.C13 ,
        FMC.C16 FMC.C17 FMC.C20 FMC.C21 FMC.C24 FMC.C25 FMC.C28 FMC.C29 ,
        FMC.C32 FMC.C33 FMC.C36 FMC.C38 FMC.C40 FMC.D2 FMC.D3 FMC.D6 FMC.D7 ,
        FMC.D10 FMC.D13 FMC.D16 FMC.D19 FMC.D22 FMC.D25 FMC.D28 FMC.D37 ,
        FMC.D39 FMC.E1 FMC.E4 FMC.E5 FMC.E8 FMC.E11 FMC.E14 FMC.E17 FMC.E20 ,
        FMC.E23 FMC.E26 FMC.E29 FMC.E32 FMC.E35 FMC.E38 FMC.E40 FMC.F2 ,
        FMC.F3 FMC.F6 FMC.F9 FMC.F12 FMC.F15 FMC.F18 FMC.F21 FMC.F24 ,
        FMC.F27 FMC.F30 FMC.F33 FMC.F36 FMC.F39 FMC.G1 FMC.G4 FMC.G5 FMC.G8 ,
        FMC.G11 FMC.G14 FMC.G17 FMC.G20 FMC.G23 FMC.G26 FMC.G29 FMC.G32 ,
        FMC.G35 FMC.G38 FMC.G40 FMC.H2 FMC.H3 FMC.H6 FMC.H9 FMC.H12 FMC.H15 ,
        FMC.H18 FMC.H21 FMC.H24 FMC.H27 FMC.H30 FMC.H33 FMC.H36 FMC.H39 ,
        FMC.J1 FMC.J4 FMC.J5 FMC.J8 FMC.J11 FMC.J14 FMC.J17 FMC.J20 FMC.J23 ,
        FMC.J26 FMC.J29 FMC.J32 FMC.J35 FMC.J38 FMC.J40 FMC.K2 FMC.K3 ,
        FMC.K6 FMC.K9 FMC.K12 FMC.K15 FMC.K18 FMC.K21 FMC.K24 FMC.K27 ,
        FMC.K30 FMC.K33 FMC.K36 FMC.K39 J2.4 J4.3 J4.6 J4.9 J4.12 J4.15 ,
        J4.18 J4.21 J4.24 J4.27 J4.30 J6.6 J11.1 J11.2 J15.1 J17.1 J18.2 ,
        J18.4 J18.6 J18.8 J18.10 J25.5 J25.6 J26.1 J26.2 J27.1 J27.2 J28.1 ,
        J28.2 J29.1 J29.2 J30.1 J30.2 J31.1 J31.2 J32.1 J32.2 J44.2 J44.4 ,
        J44.6 J44.8 J44.10 L9.3 LD10.2 MT1.1 MT2.1 MT3.1 MT4.1 MT5.1 ,
        'OR+/DCLK2+'.2 'OR+/DCLK2+'.3 'OR+/DCLK2+'.4 'OR+/DCLK2+'.5 ,
        'OR-/DCLK2-'.2 'OR-/DCLK2-'.3 'OR-/DCLK2-'.4 'OR-/DCLK2-'.5 Q1.2 ,
        Q2.2 R12.1 R20.3 R23.2 R24.1 R38.3 R40.3 R59.2 R80.1 R84.2 R89.1 ,
        R90.1 R92.1 R95.1 R97.1 R107.1 R108.1 R109.1 R111.1 R117.1 R124.1 ,
        R126.2 R135.2 R137.2 R150.2 R155.1 R156.2 R165.2 R178.2 R179.2 ,
        R186.2 R189.1 R193.2 R195.2 R196.2 R198.2 R201.2 R204.2 R206.2 ,
        R2_LF.1 SW1.2 T1.1 T1.3 T1.5 TP5.1 TP6.1 TP7.1 TP8.1 TP9.1 TP10.1 ,
        TP11.1 U2.3 U2.13 U2.20 U2.27 U2.33 U2.49 U2.58 U2.65 U2.80 U2.93 ,
        U2.116 U2.125 U3.1 U3.2 U4.2 U4.3 U4.4 U4.7 U5.A2 U5.A13 U5.A14 ,
        U5.A25 U5.AA6 U5.AA21 U5.AB12 U5.AB15 U5.AD9 U5.AD18 U5.AD24 U5.AE1 ,
        U5.AE2 U5.AE15 U5.AE16 U5.AE17 U5.AE25 U5.AE26 U5.AF2 U5.AF13 ,
        U5.AF14 U5.AF15 U5.AF16 U5.AF25 U5.B1 U5.B2 U5.B25 U5.B26 U5.C3 ,
        U5.C9 U5.C18 U5.E12 U5.E15 U5.F6 U5.F21 U5.J3 U5.J13 U5.J14 U5.J24 ,
        U5.K11 U5.K12 U5.K13 U5.K14 U5.K15 U5.K16 U5.L12 U5.L13 U5.L14 ,
        U5.L15 U5.M10 U5.M11 U5.M13 U5.M14 U5.M16 U5.M17 U5.N6 U5.N10 ,
        U5.N11 U5.N12 U5.N13 U5.N14 U5.N15 U5.N16 U5.N17 U5.N26 U5.P1 ,
        U5.P10 U5.P11 U5.P12 U5.P13 U5.P14 U5.P15 U5.P16 U5.P17 U5.P21 ,
        U5.R10 U5.R11 U5.R13 U5.R14 U5.R16 U5.R17 U5.T12 U5.T13 U5.T14 ,
        U5.T15 U5.U11 U5.U12 U5.U13 U5.U14 U5.U15 U5.U16 U5.V3 U5.V13 ,
        U5.V14 U5.V24 U5.Y16 U8.8 U8.15 U9.1 U9.6 U9.9 U9.12 U9.21 U9.24 ,
        U9.27 U9.42 U9.53 U9.64 U9.74 U9.87 U9.97 U9.108 U9.119 U9.129 ,
        U11.11 U13.5 U13.17 U14.2 U14.7 U14.17 U14.23 U14.31 U14.36 U14.46 ,
        U15.3 U15.9 U16.10 U16.13 U16.14 U16.21 U17.3 U17.6 U18.3 U18.9 ,
        U19.3 U19.9 U20.3 U20.9 U21.2 U22.3 U22.9 U23.9 U23.10 U23.11 ,
        U23.12 U23.21 U24.2 U25.5 U26.1 U26.10 U26.27 U26.37 'VINI+'.1 ,
        'VINI+'.2 'VINI-'.1 'VINI-'.2 'VINQ+'.1 'VINQ+'.2 'VINQ-'.1 ,
        'VINQ-'.2 Y2.2 Y3.2 Y4.2 
IFCLK ; U2.32 U5.AC10 
JP_1 ; J18.1 R33.2 U5.AC14 
JP_2 ; J18.3 R37.2 U5.AD14 
JP_3 ; J18.5 R36.2 U5.AA12 
JP_4 ; J18.7 R35.2 U5.AA11 
JP_5 ; J18.9 R32.2 U5.AC16 
LED_ADC_CAL ; ADC_CALIBRATION.2 U5.AE12 
LED_ADC_PWR ; ADC_POWER.2 U5.AF12 
LED_DCLK_LOCKED ; DCLK_LOCKED.2 U5.AF10 
LED_ECM_ENA ; ECM_ENABLED.2 U5.AD8 
LED_FPGA_OPER ; FPGA_OPERATIONAL.2 U5.AF11 
LED_RCOUT_ENA ; U5.AC8 
LED_TRIGGER ; TRIGGER_ARMED.2 U5.AB10 
LOAD_STATE ; R14.2 U5.AE7 
N16433245 ; J11.3 U11.3 
N16433335 ; T1.2 U11.2 
N16433810 ; Q1.1 R79.2 R80.2 
N16663533 ; J27.3 J28.3 
N16663537 ; J29.3 J30.3 
N16663541 ; J31.3 J32.3 
N16721567 ; J2.3 U2.18 
N16721659 ; J2.2 U2.19 
N16722721 ; C69.2 J2.5 J2.6 R24.2 
N16727306 ; R23.1 U2.35 
N16769321 ; C164.1 D2.2 L5.2 U13.15 
N16769692 ; C175.1 U13.2 
N16769839 ; R88.2 R89.2 U13.1 
N16770680 ; C164.2 U13.16 
N16772680 ; C161.1 R82.1 U13.4 
N16791454 ; Q1.3 U11.9 
N16798185 ; C188.2 C190.1 U16.1 
N16802160 ; R40.2 U5.G16 
N16802193 ; C75.2 U5.H13 U8.6 
N16802234 ; R31.2 U5.G14 
N16802239 ; R38.2 U5.W14 U5.W15 U5.Y15 
N16803121 ; C191.2 R103.1 U16.6 
N16805297 ; C191.1 C202.1 R105.2 R106.2 R107.2 U16.7 
N16805320 ; R53.1 Y2.3 
N16807514 ; C202.2 R103.2 
N16809137 ; R108.2 U16.8 
N16815468 ; C206.1 U16.9 
N16819191 ; C189.1 U16.20 
N16819385 ; C189.2 D4.2 L10.1 U16.17 U16.18 
N16821177 ; D4.1 U16.15 U16.16 
N16824930 ; C205.1 U16.11 
N16856164 ; C151.1 T1.4 
N16856166 ; C150.1 T1.6 
N16857048 ; R163.2 R165.1 U26.24 
N16857072 ; J157.2 R168.2 U26.20 
N16857085 ; Q2.1 R168.1 
N16857120 ; C309.2 U26.22 
N16857122 ; C307.2 U26.21 
N16857229 ; C305.1 R190.2 Y3.4 Y4.4 
N16857239 ; C306.1 Y3.3 Y4.3 
N16857308 ; J160.2 U26.34 
N16857313 ; J159.2 U26.33 
N16857321 ; J158.2 U26.32 
N16857356 ; C272.1 L19.2 U26.28 
N16857376 ; R173.1 U26.2 
N16857394 ; C281.1 R173.2 
N16857426 ; C280.1 U26.9 
N16857444 ; C282.1 R174.2 
N16857446 ; R174.1 U26.8 
N16857452 ; J161.2 U26.11 
N16857461 ; C276.1 L21.1 U26.13 
N16857504 ; C277.1 L20.1 U26.14 
N16857591 ; C1_LF.1 C2_LF.1 TP19.1 U26.15 U26.16 
N16857603 ; C2_LF.2 R2_LF.2 
N16857687 ; C268.1 L17.1 U26.19 
N16857693 ; C270.1 L18.1 U26.18 
N16857738 ; PLL_LD.2 Q2.3 
N16857748 ; PLL_LD.1 R164.2 
N16857764 ; R169.2 U26.26 
N16857788 ; C269.1 R169.1 
N16857799 ; L15.1 U26.25 
N16857801 ; L16.1 U26.23 
N16859108 ; C279.1 U26.36 
N16860475 ; C218.1 U18.1 
N16862279 ; R177.1 R179.1 U11.4 
N16862394 ; C279.2 R177.2 R178.1 
N16862422 ; C273.2 U26.30 
N16862731 ; C212.1 R109.2 R110.2 U18.6 
N16862763 ; C209.1 C212.2 L3.1 R110.1 U18.5 
N16904620 ; C308.1 R194.2 R195.1 Y3.1 Y4.1 
N16907733 ; C165.1 D3.2 L6.1 U13.10 
N16907748 ; C176.1 U13.7 
N16907762 ; R90.2 R91.2 U13.8 
N16907804 ; C165.2 U13.9 
N16908307 ; C306.2 R191.1 
N16908323 ; R191.2 R192.1 R193.1 
N16908627 ; C307.1 R192.2 
N16909551 ; C309.1 R196.1 
N16954081 ; C215.1 C219.2 L11.1 R112.1 U19.5 
N16954093 ; C220.1 U19.1 
N16954109 ; C219.1 R111.2 R112.2 U19.6 
N16954745 ; C223.1 C226.2 L12.1 R118.1 U20.5 
N16954757 ; C227.1 U20.1 
N16954773 ; C226.1 R117.2 R118.2 U20.6 
N17041129 ; R18.2 U2.99 U3.3 
N17122999 ; R20.2 U4.1 
N17127467 ; R16.1 U2.85 
N17138281 ; C64.1 C65.1 C66.1 L1.1 U2.10 U2.17 
N17209995 ; J12.2 L9.2 
N17221364 ; C157.1 L4.1 R99.2 SW2.2 
N17237535 ; LD11.2 U2.82 
N17238039 ; LD11.1 R142.1 
N17247885 ; LD10.1 R99.1 
N17271500 ; C186.1 U15.1 
N17271514 ; C185.1 R97.2 R98.2 U15.6 
N17272516 ; C230.1 C233.2 L13.1 R125.1 U22.5 
N17272520 ; C234.1 U22.1 
N17272540 ; C233.1 R124.2 R125.2 U22.6 
N17383940 ; C70.1 U2.11 Y1.1 
N17383990 ; C71.1 U2.12 Y1.2 
N17384219 ; TP2.1 U2.1 
N17400918 ; R92.2 U23.20 
N17401691 ; R93.2 U23.4 
N17402468 ; C235.1 U23.1 
N17411980 ; C236.1 R93.1 
N17414023 ; SW1.1 U3.4 
N17421515 ; C237.1 U23.18 
N17425568 ; R94.2 R95.2 U23.2 
N17434478 ; C238.2 D1.2 D5.2 L7.1 U23.7 U23.8 U23.13 U23.14 
N17462336 ; C197.1 C239.1 L7.2 L8.1 R94.1 
N17631017 ; C267.1 R120.2 R121.2 R122.2 U21.1 U21.3 U24.5 
N17751700 ; J21.1 L9.4 
N17752133 ; J21.2 SW2.3 
N17824195 ; J12.1 L9.1 
N18005197 ; J22.2 L14.1 
N18092594 ; R13.1 U2.113 
N18092628 ; R14.1 U2.112 
N18102458 ; R17.1 U2.77 
N18106734 ; C201.1 C247.1 C248.1 J22.1 R149.1 U17.4 
N18113304 ; C247.2 R149.2 R150.1 U17.5 
N18238044 ; C266.1 U24.4 
N18240998 ; J14.1 U21.6 
N18241001 ; J14.3 U21.5 
N18241004 ; J14.5 U21.4 
N18609138 ; FMC.J39 FMC.K40 J168.1 
N18612070 ; FMC.E39 FMC.F40 FMC.G39 FMC.H40 J168.2 
N19027303 ; J23.2 J36.2 R1.1 
N19030474 ; J23.4 J37.2 R2.1 
N20455301 ; R83.3 U14.12 
N20455532 ; R83.1 U14.9 
N20625411 ; J167.1 U9.31 
N20625468 ; R9.2 U9.26 
N20625481 ; R25.2 U9.29 
N20625496 ; R128.2 U9.30 
N20625508 ; R12.2 U9.32 
N20625543 ; R4.2 U9.41 
N20651978 ; R187.2 U9.52 
N20663061 ; J16.3 R188.1 
N20663066 ; J16.1 R189.2 
N20678646 ; R157.2 R158.1 U9.79 
N20678760 ; R159.1 R160.2 U9.80 
N21058732 ; R44.1 U5.AD19 
N21059382 ; R45.1 U5.AC19 
N21060033 ; R46.1 U5.AA19 
N21060685 ; R26.1 U5.AA20 
N21061992 ; R28.1 U5.AA17 
N21062647 ; R113.1 U5.AB20 
N21063303 ; R114.1 U5.AC20 
N21827542 ; R136.1 U25.7 
N21827567 ; R134.1 U25.6 
N21827581 ; J26.3 U25.2 
N21832116 ; U25.3 U25.4 
N21933562 ; R126.1 U8.9 
N23828730 ; R53.2 U5.AD12 
N23968618 ; R56.1 U5.AD25 
N1739169316 ; C238.1 U23.17 
N200444310 ; DCLK_LOCKED.1 R54.1 
N200444470 ; ECM_ENABLED.1 R55.1 
N200445120 ; R49.1 TRIGGER_ARMED.1 
N200445200 ; ADC_CALIBRATION.1 R48.1 
N200445360 ; 'OVER-RANGE'.1 R50.1 
N200445600 ; ADC_POWER.1 R47.1 
N200446320 ; FPGA_OPERATIONAL.1 R52.1 
'OR+' ; R158.2 U5.J26 
'OR+/DCLK2+' ; 'OR+/DCLK2+'.1 R157.1 
'OR-' ; R159.2 U5.J25 
'OR-/DCLK2-' ; 'OR-/DCLK2-'.1 R160.1 
OUTV ; J4.20 R113.2 R181.1 
OUT_EDGE/DDR ; J4.17 R28.2 R182.1 
'OVER-RANGE' ; 'OVER-RANGE'.2 U5.AB17 
PD ; J4.2 R9.1 R44.2 
PDQ ; J4.5 R25.1 R45.2 
PKTEND ; U2.91 U5.AE9 
PLL_CE ; J161.1 TP18.1 U5.C17 
PLL_LD ; J157.1 TP14.1 U5.H5 
PLL_LE ; J160.1 TP17.1 U5.D17 
PLL_SCLK ; J159.1 TP16.1 U5.G9 
PLL_SDATA ; J158.1 TP15.1 U5.G10 
PROGRAMB ; R85.2 U2.76 U5.H15 U14.6 
RD_N ; U2.40 U5.Y8 
RXD0 ; J25.4 U2.51 
RXD1 ; J25.3 U2.53 
SCLK ; J44.5 J163.2 R181.2 U9.3 
SCLK_ADC ; J163.1 U5.AE24 
SCLK_USI ; J15.5 J17.5 U5.F13 
SCL_FROM_CY ; J15.8 J17.8 R19.1 U2.36 U4.6 U8.13 
SCS1_USI ; J17.3 U5.F14 
SCS2_USI ; J15.3 U5.F16 
SCSB ; J44.7 J162.2 R180.2 U9.127 
SCS_ADC ; J162.1 U5.AF24 
SDA ; J20.1 R22.1 U2.37 U4.5 
SDA_FROM_CY ; J15.6 J17.6 J20.2 R21.1 R22.2 U8.12 
SDI ; J44.9 J164.2 R182.2 U9.4 
SDI_ADC ; J164.1 U5.AF22 
SDI_USI ; J15.7 J17.7 U5.F11 
SDO_ADC ; U5.AF18 
SDO_USI ; J15.4 J17.4 U5.F12 
SLCS_N ; U2.92 U5.AB9 
SLOE ; U2.84 U5.AF9 
SLRD ; U2.4 U5.AE6 
SLWR ; U2.5 U5.AD6 
STATE0 ; U2.108 U5.AD10 
STATE1 ; U2.109 U5.AD17 
STATE2 ; U2.110 U5.AD16 
STATE3 ; U2.111 U5.AD11 
TCRIT1 ; R104.2 U5.AC15 U8.10 
TCRIT2 ; R87.2 U5.AC13 U8.11 
TCRIT3 ; R86.2 U5.AD13 U8.14 
TEST1N ; R30.1 U5.AA13 U6.3 
TEST1P ; R30.2 U5.AB13 U6.1 
TEST2N ; R39.1 U5.AA15 U6.7 
TEST2P ; R39.2 U5.AA16 U6.5 
TEST3N ; R41.1 U5.AC11 U7.3 
TEST3P ; R41.2 U5.AC12 U7.1 
TEST4N ; R42.1 U5.AB14 U7.7 
TEST4P ; R42.2 U5.AA14 U7.5 
TXD0 ; J25.2 U2.50 
TXD1 ; J25.1 U2.52 
USB_PWR ; C213.1 C214.1 J2.1 U19.4 U19.8 
V4_TCK ; J6.4 U5.W12 U14.20 
V4_TDI ; J6.5 R43.1 U14.19 
V4_TDO ; J6.3 U5.Y13 
V4_TMS ; J6.2 U5.Y11 U14.21 
VCMO ; J15.9 J17.9 U9.7 
VIN ; C158.1 C159.1 C160.1 C187.1 C192.1 C193.1 C207.1 C208.1 C228.1 C229.1 ,
        C274.1 C275.1 L4.2 R82.2 U13.11 U13.12 U13.13 U13.14 U16.3 U16.4 ,
        U18.4 U22.4 U23.5 U23.6 U23.15 U23.16 U24.1 U24.3 
'VINI+' ; U9.11 'VINI+'.3 
'VINI-' ; U9.10 'VINI-'.3 
'VINQ+' ; U9.22 'VINQ+'.3 
'VINQ-' ; U9.23 'VINQ-'.3 
V_USI1 ; J13.2 J15.2 J17.2 
WE_N ; U2.41 U5.AA8 
$PACKAGES
$A_PROPERTIES
FIX_ALL; 'J15' 'TP5'
FIXED; 'J15' 'TP5'
$NETS
$A_PROPERTIES
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16856164'; 'N16856164'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16856166'; 'N16856166'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\over-range\'; 'OVER-RANGE'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sdi'; 'SDI'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):scsb'; 'SCSB'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sclk'; 'SCLK'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18612070'; 'N18612070'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18609138'; 'N18609138'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18238044'; 'N18238044'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17631017'; 'N17631017'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16909551'; 'N16909551'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16908627'; 'N16908627'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16908323'; 'N16908323'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16908307'; 'N16908307'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857120'; 'N16857120'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857239'; 'N16857239'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857229'; 'N16857229'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16904620'; 'N16904620'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20678760'; 'N20678760'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\or-/dclk2-\'; 'OR-/DCLK2-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\or+/dclk2+\'; 'OR+/DCLK2+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20678646'; 'N20678646'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857603'; 'N16857603'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857591'; 'N16857591'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cal'; 'CAL'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n23968618'; 'N23968618'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n19030474'; 'N19030474'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n19027303'; 'N19027303'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20663066'; 'N20663066'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20663061'; 'N20663061'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20651978'; 'N20651978'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):drst_sel'; 'DRST_SEL'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dclk_rst+\'; 'DCLK_RST+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):outv'; 'OUTV'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\out_edge/ddr\'; 'OUT_EDGE/DDR'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fsr/alt_ece\'; 'FSR/ALT_ECE'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\caldly/des\'; 'CALDLY/DES'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16862279'; 'N16862279'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857085'; 'N16857085'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857072'; 'N16857072'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857452'; 'N16857452'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857321'; 'N16857321'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857308'; 'N16857308'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857313'; 'N16857313'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\3v3pll\'; '3V3PLL'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\3v3pll_aux\'; '3V3PLL_AUX'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857356'; 'N16857356'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857504'; 'N16857504'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857461'; 'N16857461'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20625481'; 'N20625481'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dclk_rst-\'; 'DCLK_RST-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20625468'; 'N20625468'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20625411'; 'N20625411'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857394'; 'N16857394'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857748'; 'N16857748'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20625508'; 'N20625508'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857687'; 'N16857687'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857376'; 'N16857376'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857048'; 'N16857048'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857799'; 'N16857799'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857444'; 'N16857444'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857446'; 'N16857446'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857764'; 'N16857764'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857738'; 'N16857738'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857122'; 'N16857122'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857788'; 'N16857788'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857693'; 'N16857693'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\3v3pll_2\'; '3V3PLL_2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857801'; 'N16857801'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16857426'; 'N16857426'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20625543'; 'N20625543'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16862422'; 'N16862422'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16862394'; 'N16862394'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16859108'; 'N16859108'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20625496'; 'N20625496'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n23828730'; 'N23828730'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-0\'; 'FMC_DQD-0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-1\'; 'FMC_DQD-1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-2\'; 'FMC_DQD-2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-3\'; 'FMC_DQD-3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-4\'; 'FMC_DQD-4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-5\'; 'FMC_DQD-5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-6\'; 'FMC_DQD-6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-7\'; 'FMC_DQD-7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-8\'; 'FMC_DQD-8'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-9\'; 'FMC_DQD-9'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-10\'; 'FMC_DQD-10'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd-11\'; 'FMC_DQD-11'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+0\'; 'FMC_DQD+0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+1\'; 'FMC_DQD+1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+2\'; 'FMC_DQD+2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+3\'; 'FMC_DQD+3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+4\'; 'FMC_DQD+4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+5\'; 'FMC_DQD+5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+6\'; 'FMC_DQD+6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+7\'; 'FMC_DQD+7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+8\'; 'FMC_DQD+8'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+9\'; 'FMC_DQD+9'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+10\'; 'FMC_DQD+10'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dqd+11\'; 'FMC_DQD+11'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-0\'; 'FMC_DQ-0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-1\'; 'FMC_DQ-1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-2\'; 'FMC_DQ-2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-3\'; 'FMC_DQ-3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-4\'; 'FMC_DQ-4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-5\'; 'FMC_DQ-5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-6\'; 'FMC_DQ-6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-7\'; 'FMC_DQ-7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-8\'; 'FMC_DQ-8'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-9\'; 'FMC_DQ-9'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+0\'; 'FMC_DQ+0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+1\'; 'FMC_DQ+1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+2\'; 'FMC_DQ+2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+3\'; 'FMC_DQ+3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+4\'; 'FMC_DQ+4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+5\'; 'FMC_DQ+5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+6\'; 'FMC_DQ+6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+7\'; 'FMC_DQ+7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+8\'; 'FMC_DQ+8'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+9\'; 'FMC_DQ+9'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):fmc_pg_c2m'; 'FMC_PG_C2M'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):fmc_pg_m2c'; 'FMC_PG_M2C'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_rcout2-\'; 'FMC_RCOUT2-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dclk_dq-\'; 'FMC_DCLK_DQ-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_rcout2+\'; 'FMC_RCOUT2+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_rcout1-\'; 'FMC_RCOUT1-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_rcout1+\'; 'FMC_RCOUT1+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dclk_dq+\'; 'FMC_DCLK_DQ+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):fmc_calrun'; 'FMC_CALRUN'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dclk_di-\'; 'FMC_DCLK_DI-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dclk_di+\'; 'FMC_DCLK_DI+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dclk_did+\'; 'FMC_DCLK_DID+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dclk_did-\'; 'FMC_DCLK_DID-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dclk_dqd-\'; 'FMC_DCLK_DQD-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dclk_dqd+\'; 'FMC_DCLK_DQD+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18106734'; 'N18106734'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\2v45io\'; '2V45IO'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\2v45io_pre\'; '2V45IO_PRE'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18113304'; 'N18113304'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-10\'; 'FMC_DQ-10'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq-11\'; 'FMC_DQ-11'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+10\'; 'FMC_DQ+10'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_dq+11\'; 'FMC_DQ+11'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-0\'; 'FMC_DID-0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-1\'; 'FMC_DID-1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-2\'; 'FMC_DID-2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-3\'; 'FMC_DID-3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-4\'; 'FMC_DID-4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-5\'; 'FMC_DID-5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-6\'; 'FMC_DID-6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-7\'; 'FMC_DID-7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-8\'; 'FMC_DID-8'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-9\'; 'FMC_DID-9'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-10\'; 'FMC_DID-10'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did-11\'; 'FMC_DID-11'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+0\'; 'FMC_DID+0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+1\'; 'FMC_DID+1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+2\'; 'FMC_DID+2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+3\'; 'FMC_DID+3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+4\'; 'FMC_DID+4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+5\'; 'FMC_DID+5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+6\'; 'FMC_DID+6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+7\'; 'FMC_DID+7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+8\'; 'FMC_DID+8'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+9\'; 'FMC_DID+9'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+10\'; 'FMC_DID+10'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_did+11\'; 'FMC_DID+11'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-2\'; 'FMC_DI-2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-3\'; 'FMC_DI-3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-4\'; 'FMC_DI-4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-5\'; 'FMC_DI-5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-6\'; 'FMC_DI-6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-7\'; 'FMC_DI-7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-8\'; 'FMC_DI-8'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-9\'; 'FMC_DI-9'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+0\'; 'FMC_DI+0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+1\'; 'FMC_DI+1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+2\'; 'FMC_DI+2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+3\'; 'FMC_DI+3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+4\'; 'FMC_DI+4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+5\'; 'FMC_DI+5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+6\'; 'FMC_DI+6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+7\'; 'FMC_DI+7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+8\'; 'FMC_DI+8'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+9\'; 'FMC_DI+9'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-0\'; 'FMC_DI-0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-1\'; 'FMC_DI-1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-10\'; 'FMC_DI-10'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+10\'; 'FMC_DI+10'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_ori-\'; 'FMC_ORI-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_ori+\'; 'FMC_ORI+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di-11\'; 'FMC_DI-11'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_di+11\'; 'FMC_DI+11'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_orq-\'; 'FMC_ORQ-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\fmc_orq+\'; 'FMC_ORQ+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):led_dclk_locked'; 'LED_DCLK_LOCKED'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):led_fpga_oper'; 'LED_FPGA_OPER'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):led_adc_cal'; 'LED_ADC_CAL'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):led_adc_pwr'; 'LED_ADC_PWR'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):led_rcout_ena'; 'LED_RCOUT_ENA'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):led_ecm_ena'; 'LED_ECM_ENA'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):adc_pwr'; 'ADC_PWR'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17238039'; 'N17238039'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17237535'; 'N17237535'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16663537'; 'N16663537'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16663541'; 'N16663541'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16663533'; 'N16663533'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):calrun'; 'CALRUN'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\vinq+\'; 'VINQ+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16721659'; 'N16721659'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\vinq-\'; 'VINQ-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\clk+\'; 'CLK+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):state0'; 'STATE0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\adc_tdiode-\'; 'ADC_TDIODE-'
ELECTRICAL_CONSTRAINT_SET 'TDIODE'; 'N16802193' 'ADC_TDIODE-' 'ADC_TDIODE+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did+6\'; 'DID+6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did+7\'; 'DID+7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):pll_sdata'; 'PLL_SDATA'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):fifoadr0'; 'FIFOADR0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):fifoadr1'; 'FIFOADR1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16802234'; 'N16802234'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd0'; 'CY_FD0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):pll_ce'; 'PLL_CE'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd1'; 'CY_FD1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd2'; 'CY_FD2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd3'; 'CY_FD3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):pll_ld'; 'PLL_LD'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd4'; 'CY_FD4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd5'; 'CY_FD5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd6'; 'CY_FD6'
DIFFERENTIAL_PAIR 'DCLK_RST'; 'DCLK_RST-' 'DCLK_RST+'
DIFFERENTIAL_PAIR 'FMC_DQD0'; 'FMC_DQD+0' 'FMC_DQD-0'
DIFFERENTIAL_PAIR 'FMC_DQD1'; 'FMC_DQD+1' 'FMC_DQD-1'
DIFFERENTIAL_PAIR 'FMC_DQD2'; 'FMC_DQD+2' 'FMC_DQD-2'
DIFFERENTIAL_PAIR 'FMC_DQD3'; 'FMC_DQD+3' 'FMC_DQD-3'
DIFFERENTIAL_PAIR 'FMC_DQD4'; 'FMC_DQD+4' 'FMC_DQD-4'
DIFFERENTIAL_PAIR 'FMC_DQD5'; 'FMC_DQD+5' 'FMC_DQD-5'
DIFFERENTIAL_PAIR 'FMC_DQD6'; 'FMC_DQD+6' 'FMC_DQD-6'
DIFFERENTIAL_PAIR 'FMC_DQD7'; 'FMC_DQD+7' 'FMC_DQD-7'
DIFFERENTIAL_PAIR 'FMC_DQD8'; 'FMC_DQD+8' 'FMC_DQD-8'
DIFFERENTIAL_PAIR 'FMC_DQD9'; 'FMC_DQD+9' 'FMC_DQD-9'
DIFFERENTIAL_PAIR 'FMC_DQD10'; 'FMC_DQD+10' 'FMC_DQD-10'
DIFFERENTIAL_PAIR 'FMC_DQD11'; 'FMC_DQD+11' 'FMC_DQD-11'
DIFFERENTIAL_PAIR 'FMC_DQ0'; 'FMC_DQ+0' 'FMC_DQ-0'
DIFFERENTIAL_PAIR 'FMC_DQ1'; 'FMC_DQ+1' 'FMC_DQ-1'
DIFFERENTIAL_PAIR 'FMC_DQ2'; 'FMC_DQ+2' 'FMC_DQ-2'
DIFFERENTIAL_PAIR 'FMC_DQ3'; 'FMC_DQ+3' 'FMC_DQ-3'
DIFFERENTIAL_PAIR 'FMC_DQ4'; 'FMC_DQ+4' 'FMC_DQ-4'
DIFFERENTIAL_PAIR 'FMC_DQ5'; 'FMC_DQ+5' 'FMC_DQ-5'
DIFFERENTIAL_PAIR 'FMC_DQ6'; 'FMC_DQ+6' 'FMC_DQ-6'
DIFFERENTIAL_PAIR 'FMC_DQ7'; 'FMC_DQ+7' 'FMC_DQ-7'
DIFFERENTIAL_PAIR 'FMC_DQ8'; 'FMC_DQ+8' 'FMC_DQ-8'
DIFFERENTIAL_PAIR 'FMC_DQ9'; 'FMC_DQ+9' 'FMC_DQ-9'
DIFFERENTIAL_PAIR 'FMC_RCOUT2'; 'FMC_RCOUT2+' 'FMC_RCOUT2-'
DIFFERENTIAL_PAIR 'FMC_DCLK_DI'; 'FMC_DCLK_DI+' 'FMC_DCLK_DI-'
DIFFERENTIAL_PAIR 'FMC_DCLK_DQD'; 'FMC_DCLK_DQD+' 'FMC_DCLK_DQD-'
DIFFERENTIAL_PAIR 'FMC_DQ10'; 'FMC_DQ+10' 'FMC_DQ-10'
DIFFERENTIAL_PAIR 'FMC_DQ11'; 'FMC_DQ+11' 'FMC_DQ-11'
DIFFERENTIAL_PAIR 'FMC_DID0'; 'FMC_DID+0' 'FMC_DID-0'
DIFFERENTIAL_PAIR 'FMC_DID1'; 'FMC_DID+1' 'FMC_DID-1'
DIFFERENTIAL_PAIR 'FMC_DID2'; 'FMC_DID+2' 'FMC_DID-2'
DIFFERENTIAL_PAIR 'FMC_DID3'; 'FMC_DID+3' 'FMC_DID-3'
DIFFERENTIAL_PAIR 'FMC_DID4'; 'FMC_DID+4' 'FMC_DID-4'
DIFFERENTIAL_PAIR 'FMC_DID5'; 'FMC_DID+5' 'FMC_DID-5'
DIFFERENTIAL_PAIR 'FMC_DID6'; 'FMC_DID+6' 'FMC_DID-6'
DIFFERENTIAL_PAIR 'FMC_DID7'; 'FMC_DID+7' 'FMC_DID-7'
DIFFERENTIAL_PAIR 'FMC_DID8'; 'FMC_DID+8' 'FMC_DID-8'
DIFFERENTIAL_PAIR 'FMC_DID9'; 'FMC_DID+9' 'FMC_DID-9'
DIFFERENTIAL_PAIR 'FMC_DID10'; 'FMC_DID+10' 'FMC_DID-10'
DIFFERENTIAL_PAIR 'FMC_DID11'; 'FMC_DID+11' 'FMC_DID-11'
DIFFERENTIAL_PAIR 'FMC_DI2'; 'FMC_DI+2' 'FMC_DI-2'
DIFFERENTIAL_PAIR 'FMC_DI3'; 'FMC_DI+3' 'FMC_DI-3'
DIFFERENTIAL_PAIR 'FMC_DI4'; 'FMC_DI+4' 'FMC_DI-4'
DIFFERENTIAL_PAIR 'FMC_DI5'; 'FMC_DI+5' 'FMC_DI-5'
DIFFERENTIAL_PAIR 'FMC_DI6'; 'FMC_DI+6' 'FMC_DI-6'
DIFFERENTIAL_PAIR 'FMC_DI7'; 'FMC_DI+7' 'FMC_DI-7'
DIFFERENTIAL_PAIR 'FMC_DI8'; 'FMC_DI+8' 'FMC_DI-8'
DIFFERENTIAL_PAIR 'FMC_DI9'; 'FMC_DI+9' 'FMC_DI-9'
DIFFERENTIAL_PAIR 'FMC_DI0'; 'FMC_DI-0' 'FMC_DI+0'
DIFFERENTIAL_PAIR 'FMC_DI1'; 'FMC_DI-1' 'FMC_DI+1'
DIFFERENTIAL_PAIR 'FMC_ORI'; 'FMC_ORI+' 'FMC_ORI-'
DIFFERENTIAL_PAIR 'FMC_ORQ'; 'FMC_ORQ+' 'FMC_ORQ-'
DIFFERENTIAL_PAIR 'EXT_TRIG'; 'EXT_TRIG-' 'EXT_TRIG+'
DIFFERENTIAL_PAIR 'DCLK'; 'DCLK-' 'DCLK+'
DIFFERENTIAL_PAIR 'DQD0'; 'DQD-0' 'DQD+0'
DIFFERENTIAL_PAIR 'DQD1'; 'DQD-1' 'DQD+1'
DIFFERENTIAL_PAIR 'DID7'; 'DID+7' 'DID-7'
DIFFERENTIAL_PAIR 'DID6'; 'DID+6' 'DID-6'
DIFFERENTIAL_PAIR 'DID5'; 'DID+5' 'DID-5'
DIFFERENTIAL_PAIR 'DID4'; 'DID+4' 'DID-4'
DIFFERENTIAL_PAIR 'DID3'; 'DID+3' 'DID-3'
DIFFERENTIAL_PAIR 'DID2'; 'DID+2' 'DID-2'
DIFFERENTIAL_PAIR 'DID1'; 'DID+1' 'DID-1'
DIFFERENTIAL_PAIR 'DID0'; 'DID+0' 'DID-0'
DIFFERENTIAL_PAIR 'DQ7'; 'DQ-7' 'DQ+7'
DIFFERENTIAL_PAIR 'DQ6'; 'DQ-6' 'DQ+6'
DIFFERENTIAL_PAIR 'DQ5'; 'DQ-5' 'DQ+5'
DIFFERENTIAL_PAIR 'DQ4'; 'DQ-4' 'DQ+4'
DIFFERENTIAL_PAIR 'DQ3'; 'DQ-3' 'DQ+3'
DIFFERENTIAL_PAIR 'DQ2'; 'DQ-2' 'DQ+2'
DIFFERENTIAL_PAIR 'DQ1'; 'DQ-1' 'DQ+1'
DIFFERENTIAL_PAIR 'DQ0'; 'DQ-0' 'DQ+0'
DIFFERENTIAL_PAIR 'TEST4'; 'TEST4N' 'TEST4P'
DIFFERENTIAL_PAIR 'TEST2'; 'TEST2N' 'TEST2P'
DIFFERENTIAL_PAIR 'DI7'; 'DI-7' 'DI+7'
DIFFERENTIAL_PAIR 'DI6'; 'DI-6' 'DI+6'
DIFFERENTIAL_PAIR 'DI5'; 'DI-5' 'DI+5'
DIFFERENTIAL_PAIR 'DI4'; 'DI-4' 'DI+4'
DIFFERENTIAL_PAIR 'DI3'; 'DI-3' 'DI+3'
DIFFERENTIAL_PAIR 'DI2'; 'DI-2' 'DI+2'
DIFFERENTIAL_PAIR 'DI1'; 'DI-1' 'DI+1'
DIFFERENTIAL_PAIR 'DI0'; 'DI-0' 'DI+0'
DIFFERENTIAL_PAIR 'VINI'; 'VINI+' 'VINI-'
DIFFERENTIAL_PAIR 'CLKIN'; 'CLK-' 'CLK+'
DIFFERENTIAL_PAIR 'VINQ'; 'VINQ-' 'VINQ+'
DIFFERENTIAL_PAIR 'DQD7'; 'DQD-7' 'DQD+7'
DIFFERENTIAL_PAIR 'DQD6'; 'DQD-6' 'DQD+6'
DIFFERENTIAL_PAIR 'TEST3'; 'TEST3N' 'TEST3P'
DIFFERENTIAL_PAIR 'DQD5'; 'DQD-5' 'DQD+5'
DIFFERENTIAL_PAIR 'DQD4'; 'DQD-4' 'DQD+4'
DIFFERENTIAL_PAIR 'DQD3'; 'DQD-3' 'DQD+3'
DIFFERENTIAL_PAIR 'DQD2'; 'DQD-2' 'DQD+2'
DIFFERENTIAL_PAIR 'TEST1'; 'TEST1N' 'TEST1P'
DIFFERENTIAL_PAIR 'OR'; 'OR-' 'OR+'
DIFFERENTIAL_PAIR 'TEST_TRACE'; 'N16663541' 'N16663537'
DIFFERENTIAL_PAIR 'FMC_DI11'; 'FMC_DI+11' 'FMC_DI-11'
DIFFERENTIAL_PAIR 'FMC_DI10'; 'FMC_DI+10' 'FMC_DI-10'
DIFFERENTIAL_PAIR 'FMC_DCLK_DID'; 'FMC_DCLK_DID-' 'FMC_DCLK_DID+'
DIFFERENTIAL_PAIR 'FMC_DCLK_DQ'; 'FMC_DCLK_DQ+' 'FMC_DCLK_DQ-'
DIFFERENTIAL_PAIR 'FMC_RCOUT1'; 'FMC_RCOUT1+' 'FMC_RCOUT1-'
DIFFERENTIAL_PAIR 'OR/DCLK'; 'OR+/DCLK2+' 'OR-/DCLK2-'
SAME_NET_SPACING_CONSTRAINT_SET 'TDIODE'; 'N16802193' 'ADC_TDIODE-' 'ADC_TDIODE+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16802193'; 'N16802193'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did+5\'; 'DID+5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did+4\'; 'DID+4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):pll_le'; 'PLL_LE'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did+3\'; 'DID+3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did+2\'; 'DID+2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did+1\'; 'DID+1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did+0\'; 'DID+0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_valid'; 'CY_VALID'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):conf_din'; 'CONF_DIN'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):flagb'; 'FLAGB'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_req'; 'CY_REQ'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16802160'; 'N16802160'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr15'; 'CY_ADDR15'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr14'; 'CY_ADDR14'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):we_n'; 'WE_N'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr13'; 'CY_ADDR13'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr12'; 'CY_ADDR12'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):v4_tdo'; 'V4_TDO'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16433810'; 'N16433810'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr11'; 'CY_ADDR11'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cs_n'; 'CS_N'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr10'; 'CY_ADDR10'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):programb'; 'PROGRAMB'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):vin'; 'VIN'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr9'; 'CY_ADDR9'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):slcs_n'; 'SLCS_N'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr8'; 'CY_ADDR8'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr7'; 'CY_ADDR7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):conf_initb'; 'CONF_INITB'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr6'; 'CY_ADDR6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr5'; 'CY_ADDR5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):v4_tdi'; 'V4_TDI'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr4'; 'CY_ADDR4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr3'; 'CY_ADDR3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr2'; 'CY_ADDR2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):v4_tck'; 'V4_TCK'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr1'; 'CY_ADDR1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):flaga'; 'FLAGA'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_addr0'; 'CY_ADDR0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):pktend'; 'PKTEND'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16791454'; 'N16791454'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):v4_tms'; 'V4_TMS'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):conf_cclk'; 'CONF_CCLK'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):slwr'; 'SLWR'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):ece'; 'ECE'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):load_state'; 'LOAD_STATE'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):pd'; 'PD'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):slrd'; 'SLRD'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):rd_n'; 'RD_N'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq-7\'; 'DQ-7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):pdq'; 'PDQ'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq-6\'; 'DQ-6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sloe'; 'SLOE'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq-5\'; 'DQ-5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):flagc'; 'FLAGC'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq-4\'; 'DQ-4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17127467'; 'N17127467'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq-3\'; 'DQ-3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq-2\'; 'DQ-2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq-1\'; 'DQ-1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18092594'; 'N18092594'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq-0\'; 'DQ-0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sdo_adc'; 'SDO_ADC'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\3v3io\'; '3V3IO'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):scs_adc'; 'SCS_ADC'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sdi_adc'; 'SDI_ADC'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16722721'; 'N16722721'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):vcmo'; 'VCMO'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17041129'; 'N17041129'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\3v3usb\'; '3V3USB'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n200444470'; 'N200444470'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n200445200'; 'N200445200'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n200444310'; 'N200444310'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n200445120'; 'N200445120'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):test4n'; 'TEST4N'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n200445600'; 'N200445600'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n200445360'; 'N200445360'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):test2n'; 'TEST2N'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n200446320'; 'N200446320'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17122999'; 'N17122999'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17414023'; 'N17414023'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17384219'; 'N17384219'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17383940'; 'N17383940'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17383990'; 'N17383990'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):jp_5'; 'JP_5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):jp_4'; 'JP_4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):jp_3'; 'JP_3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di-7\'; 'DI-7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):jp_2'; 'JP_2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di-6\'; 'DI-6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di-5\'; 'DI-5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di-4\'; 'DI-4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di-3\'; 'DI-3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di-2\'; 'DI-2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\2v5io\'; '2V5IO'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di-1\'; 'DI-1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di-0\'; 'DI-0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18102458'; 'N18102458'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18092628'; 'N18092628'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16721567'; 'N16721567'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_data7'; 'CY_DATA7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_data6'; 'CY_DATA6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_data5'; 'CY_DATA5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_data4'; 'CY_DATA4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_data3'; 'CY_DATA3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_data2'; 'CY_DATA2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_data1'; 'CY_DATA1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_data0'; 'CY_DATA0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\vini+\'; 'VINI+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):state3'; 'STATE3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\clk-\'; 'CLK-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16727306'; 'N16727306'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):state2'; 'STATE2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):state1'; 'STATE1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\vini-\'; 'VINI-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\adc_tdiode+\'; 'ADC_TDIODE+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_ctl5'; 'CY_CTL5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_ctl4'; 'CY_CTL4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_ctl3'; 'CY_CTL3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di+7\'; 'DI+7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di+6\'; 'DI+6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):jp_1'; 'JP_1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di+5\'; 'DI+5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di+4\'; 'DI+4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di+3\'; 'DI+3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di+2\'; 'DI+2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di+1\'; 'DI+1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\di+0\'; 'DI+0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_id3'; 'CY_ID3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_id2'; 'CY_ID2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16805320'; 'N16805320'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):test4p'; 'TEST4P'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd-7\'; 'DQD-7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd-6\'; 'DQD-6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):test3n'; 'TEST3N'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd-5\'; 'DQD-5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd-4\'; 'DQD-4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd-3\'; 'DQD-3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd-2\'; 'DQD-2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):test2p'; 'TEST2P'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd-1\'; 'DQD-1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd-0\'; 'DQD-0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):test3p'; 'TEST3P'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):test1n'; 'TEST1N'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):test1p'; 'TEST1P'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):led_trigger'; 'LED_TRIGGER'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):usb_pwr'; 'USB_PWR'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq+7\'; 'DQ+7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq+6\'; 'DQ+6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq+5\'; 'DQ+5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq+4\'; 'DQ+4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq+3\'; 'DQ+3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq+2\'; 'DQ+2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq+1\'; 'DQ+1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dq+0\'; 'DQ+0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd+7\'; 'DQD+7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd+6\'; 'DQD+6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd+5\'; 'DQD+5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd+4\'; 'DQD+4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd+3\'; 'DQD+3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd+2\'; 'DQD+2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd+1\'; 'DQD+1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sdi_usi'; 'SDI_USI'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dqd+0\'; 'DQD+0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sclk_usi'; 'SCLK_USI'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did-7\'; 'DID-7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did-6\'; 'DID-6'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did-5\'; 'DID-5'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did-4\'; 'DID-4'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did-3\'; 'DID-3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did-2\'; 'DID-2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did-1\'; 'DID-1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\did-0\'; 'DID-0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\1v9a\'; '1V9A'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd15'; 'CY_FD15'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd14'; 'CY_FD14'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd13'; 'CY_FD13'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16802239'; 'N16802239'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd12'; 'CY_FD12'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd11'; 'CY_FD11'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd10'; 'CY_FD10'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd9'; 'CY_FD9'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd8'; 'CY_FD8'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_fd7'; 'CY_FD7'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17271514'; 'N17271514'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17271500'; 'N17271500'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17247885'; 'N17247885'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dclk-\'; 'DCLK-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18241004'; 'N18241004'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\dclk+\'; 'DCLK+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18240998'; 'N18240998'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18241001'; 'N18241001'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\or-\'; 'OR-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):enable2'; 'ENABLE2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):enable3'; 'ENABLE3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):enable1'; 'ENABLE1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):scl_from_cy'; 'SCL_FROM_CY'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):fpga_reset'; 'FPGA_RESET'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):conf_done'; 'CONF_DONE'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sda_from_cy'; 'SDA_FROM_CY'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17272540'; 'N17272540'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17272516'; 'N17272516'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17272520'; 'N17272520'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17824195'; 'N17824195'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16907733'; 'N16907733'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16907748'; 'N16907748'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16907762'; 'N16907762'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16907804'; 'N16907804'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\1v2vcc_int\'; '1V2VCC_INT'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16798185'; 'N16798185'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16805297'; 'N16805297'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16807514'; 'N16807514'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16803121'; 'N16803121'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16815468'; 'N16815468'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16809137'; 'N16809137'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16821177'; 'N16821177'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16819191'; 'N16819191'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16819385'; 'N16819385'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16824930'; 'N16824930'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_id1'; 'CY_ID1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):cy_id0'; 'CY_ID0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16769321'; 'N16769321'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):ext_clk_select'; 'EXT_CLK_SELECT'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16769839'; 'N16769839'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16770680'; 'N16770680'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16769692'; 'N16769692'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16860475'; 'N16860475'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16862731'; 'N16862731'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17138281'; 'N17138281'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16772680'; 'N16772680'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16954081'; 'N16954081'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16954109'; 'N16954109'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16954773'; 'N16954773'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16954757'; 'N16954757'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16954093'; 'N16954093'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16954745'; 'N16954745'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\3v3usi1\'; '3V3USI1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17209995'; 'N17209995'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\5v0usi1\'; '5V0USI1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\or+\'; 'OR+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17425568'; 'N17425568'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n1739169316'; 'N1739169316'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17434478'; 'N17434478'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):flash_tdo'; 'FLASH_TDO'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20455301'; 'N20455301'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n20455532'; 'N20455532'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17401691'; 'N17401691'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17400918'; 'N17400918'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\1v8io\'; '1V8IO'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17402468'; 'N17402468'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17411980'; 'N17411980'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17421515'; 'N17421515'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sdo_usi'; 'SDO_USI'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):pll_sclk'; 'PLL_SCLK'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):gnd'; 'GND'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17221364'; 'N17221364'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16862763'; 'N16862763'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sclk_adc'; 'SCLK_ADC'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):tcrit3'; 'TCRIT3'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):tcrit1'; 'TCRIT1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):tcrit2'; 'TCRIT2'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21063303'; 'N21063303'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21058732'; 'N21058732'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21061992'; 'N21061992'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21060685'; 'N21060685'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21062647'; 'N21062647'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21059382'; 'N21059382'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21060033'; 'N21060033'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):ifclk'; 'IFCLK'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21933562'; 'N21933562'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\1v9dr\'; '1V9DR'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\1v9ac\'; '1V9AC'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17751700'; 'N17751700'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17752133'; 'N17752133'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):enable26400'; 'ENABLE26400'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):txd0'; 'TXD0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):rxd0'; 'RXD0'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):txd1'; 'TXD1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):rxd1'; 'RXD1'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16433335'; 'N16433335'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n16433245'; 'N16433245'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n17462336'; 'N17462336'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n18005197'; 'N18005197'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21827567'; 'N21827567'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21827542'; 'N21827542'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21832116'; 'N21832116'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\ext_trig-\'; 'EXT_TRIG-'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):\ext_trig+\'; 'EXT_TRIG+'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):n21827581'; 'N21827581'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):sda'; 'SDA'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):scs1_usi'; 'SCS1_USI'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):scs2_usi'; 'SCS2_USI'
LOGICAL_PATH '@adc0xd1520rb_r1.topblock(sch_1):v_usi1'; 'V_USI1'
TOTAL_ETCH_LENGTH '1999 MIL:2001 MIL'; 'N16663533'
$PINS
$A_PROPERTIES
DYN_OVERSIZE_THERM_WIDTH '10 MIL'; J2.5 J2.6
$END
