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|*||Data sheet||ADC12DJ3200 6.4-GSPS Single-Channel or 3.2-GSPS Dual-Channel, 12-bit, RF-Sampling Analog-to-Digital Converter (ADC) datasheet (Rev. A)||21 Feb 2019|
|Technical article||How smart AFEs offer an integrated analog solution for thermoelectric cooling control||04 Jan 2022|
|Technical article||Keys to quick success using high-speed data converters||13 Oct 2020|
|User guide||ADC12DJ3200EVMCVAL with Alpha Data Xilinx® Kintex Ultrascale Space Dev. Kit (Rev. A)||27 Aug 2020|
|Technical article||So, what's a VNA anyway?||23 Aug 2019|
|Technical article||So, what's the deal with frequency response?||23 Aug 2019|
|Application notes||Intel Stratix 10 GX 16-Lane RX JESD204B-ADC12DJ3200 Interoperability Reference Design||30 May 2018|
|User guide||ADCxxDJxx00 Evaluation Module User's Guide (Rev. A)||09 Jan 2018|
|Analog design journal||Designing a modern power supply for RF sampling converters||26 Apr 2017|
For additional terms or required resources, click any title below to view the detail page where available.
|FCBGA (AAV)||144||View options|
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