Ultra-high-resolution 4-kSPS 2-ch ADC w/ PGA and low-power mode for seismic and geospace exploration


Product details


Resolution (Bits) 31 Number of input channels 2 Sample rate (Max) (kSPS) 4 Interface type SPI Architecture Delta-Sigma Input type Differential Multi-channel configuration Multiplexed Rating Catalog Reference mode Ext Input range (Max) (V) 2.5 Input range (Min) (V) 0.039 Features PGA Operating temperature range (C) -40 to 85 Power consumption (Typ) (mW) 12 Analog voltage AVDD (Min) (V) 2.5, 0 SNR (dB) 127 Analog voltage AVDD (Max) (V) 2.5, 5 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 3.6 open-in-new Find other Precision ADCs (<=10MSPS)

Package | Pins | Size

VQFN (RHF) 24 20 mm² 5 x 4 open-in-new Find other Precision ADCs (<=10MSPS)


  • Selectable Operating Modes
  • Low-Power Mode:
    • 12 mW (PGA = 1, 2, 4 and 8)
    • 127 dB SNR (250 SPS, PGA = 1)
  • High-Resolution Mode:
    • 18 mW (PGA = 1, 2, 4 and 8)
    • 130 dB SNR (250 SPS, PGA = 1)
  • THD: –122 dB
  • CMRR: 110 dB
  • Two-Channel Multiplexer
  • Inherently-Stable Modulator
  • Fast Responding Overrange Detector
  • Flexible Digital Filter:
    • Sinc + FIR + IIR (Selectable)
    • Linear or Minimum Phase Option
    • Programmable High-Pass Filter
  • Offset and Gain Calibration
  • SYNC Input
  • Analog Supply: 5 V or ±2.5 V
  • Digital Supply: 1.8 V to 3.3 V
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The ADS1284 is a high-performance, single-chip, analog-to-digital converter (ADC). This device includes a low-noise programmable gain amplifier (PGA), delta-sigma (ΔΣ) modulator, and digital filter. The ADC supports two modes of operation with trade-offs between power and resolution.

The two-channel multiplexer has the inputs for signal measurement and an ADC signal test. A mode is available to short circuit the inputs and test for internal noise. The PGA has the high input impedance and low noise, which provides for the direct connection of geophone and hydrophone sensors.

The fourth-order, inherently stable modulator provides outstanding noise and linearity performance. The modulator output is filtered and decimated by the on-chip digital filter to yield the ADC conversion result.

The digital filter provides data rates from 250 to 4000 SPS. The high-pass filter (HPF) has a programmable corner frequency. On-chip gain and offset scale registers support system calibration.

The synchronization input controls the timing of the ADC conversion. The power-down input puts the ADC into power-down mode.

The ADS1284 is available in a compact 24-lead, 5-mm × 4-mm VQFN package, and is fully specified from –40°C to +85°C, with a maximum operating temperature range of –50°C to +125°C.

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* Data sheet ADS1284 High-Resolution, Analog-to-Digital Converter datasheet (Rev. A) Aug. 27, 2019
E-book Fundamentals of Precision ADC Noise Analysis Jun. 19, 2020

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VQFN (RHF) 24 View options

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