Product details

Sample rate (Max) (MSPS) 40 Resolution (Bits) 12 Number of input channels 4 Interface type Parallel LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Input range (Vp-p) 1 Power consumption (Typ) (mW) 607 Architecture Pipeline SNR (dB) 70.5 ENOB (Bits) 11.3 SFDR (dB) 87 Operating temperature range (C) -40 to 85 Input buffer No
Sample rate (Max) (MSPS) 40 Resolution (Bits) 12 Number of input channels 4 Interface type Parallel LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Input range (Vp-p) 1 Power consumption (Typ) (mW) 607 Architecture Pipeline SNR (dB) 70.5 ENOB (Bits) 11.3 SFDR (dB) 87 Operating temperature range (C) -40 to 85 Input buffer No
HTQFP (PAP) 64 100 mm² 10 x 10
  • Maximum Sample Rate: 40MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation:
    Internal Reference: 584mW
    External Reference: 518mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 70.5dBFS SNR at 10MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • HTQFP-64 PowerPAD Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Tape Drives
    • Test Equipment
    • Optical Networking
    • Communications

PowerPAD Is a trademark of Texas Instruments
All other trademarks are the property of their respective owners

  • Maximum Sample Rate: 40MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation:
    Internal Reference: 584mW
    External Reference: 518mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 70.5dBFS SNR at 10MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • HTQFP-64 PowerPAD Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Tape Drives
    • Test Equipment
    • Optical Networking
    • Communications

PowerPAD Is a trademark of Texas Instruments
All other trademarks are the property of their respective owners

The ADS5240 is a high-performance, 40MSPS, 4-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the four data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5240 provides internal references, or can optionally be driven with external references. Best performance can be achieved through the internal reference mode.

The device is available in an HTQFP-64 PowerPAD package and is specified over a -40°C to +85°C operating range.

The ADS5240 is a high-performance, 40MSPS, 4-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the four data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5240 provides internal references, or can optionally be driven with external references. Best performance can be achieved through the internal reference mode.

The device is available in an HTQFP-64 PowerPAD package and is specified over a -40°C to +85°C operating range.

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Technical documentation

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Type Title Date
* Data sheet 4-Channel, 12-Bit, 40MSPS ADC with Serial LVDS Interface datasheet (Rev. E) 06 Jan 2009
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 May 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 Jul 2013
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28 Apr 2009
Application note CDCE62005 as Clock Solution for High-Speed ADCs 04 Sep 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 Jun 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 Jun 2008
EVM User's guide ADS5240/5242 EVM User's Guide 20 Oct 2005
Application note Interfacing High-Speed LVDS Outputs of the ADS527x/ADS524x 23 Feb 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

ADS5240 IBIS Model

SBAM003.ZIP (19 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Calculation tool

ADC-HARMONIC-CALC — Analog-to-digital converter (ADC) harmonic calculator

    The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

Calculation tool

JITTER-SNR-CALC — Jitter and SNR Calculator for ADCs

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
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