8-Bit, 60-MSPS Analog-to-Digital Converter (ADC)
Product details
Parameters
Package | Pins | Size
Features
- HIGH SNR: 49.5dB
- INTERNAL/ EXTERNAL REFERENCE OPTION
- SINGLE-ENDED OR DIFFERENTIAL ANALOG INPUT
- PROGRAMMABLE INPUT RANGE:
1Vp-p/2Vp-p - LOW POWER: 170mW
- LOW DNL: 0.2LSB
- SINGLE +5V SUPPLY OPERATION
- SSOP-20 PACKAGE
- APPLICATIONS
- MEDICAL IMAGING
- VIDEO DIGITIZING
- COMMUNICATIONS
- DISK-DRIVE CONTROL
Description
The ADS830 is a pipeline, CMOS Analog-to-Digital (A/D) converter that operates from a single +5V power supply. This converter provides excellent performance with a single-ended input and can be operated with a differential input for added spurious performance. This high performance converter includes an 8-bit quantizer, high bandwidth track/hold, and a high accuracy internal reference. It also allows for the user to disable the internal reference and utilize external references. This external reference option provides excellent gain and offset matching when used in multi-channel applications or in applications where DC full scale range adjustment is required.
The ADS830 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin needed for medical imaging, communications, video, and test instrumentation.
The ADS830 is specified at a maximum sampling frequency of 60MHz and a single-ended input range of 1.5V to 3.5V. The ADS830 is available in a SSOP-20 package and is pin-for-pin compatible with the 8-bit, 80MHz ADS831.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | ADS830: SpeedPlus? 8-Bit, 60MHz Sampling Analog-To-Digital Converter datasheet (Rev. A) | Feb. 23, 2001 |
Technical article | Keys to quick success using high-speed data converters | Oct. 13, 2020 | |
Technical article | How to achieve fast frequency hopping | Mar. 03, 2019 | |
Technical article | RF sampling: Learning more about latency | Feb. 09, 2017 | |
Technical article | Why phase noise matters in RF sampling converters | Nov. 28, 2016 | |
Application note | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | Sep. 10, 2010 | |
Application note | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | Apr. 28, 2009 | |
Application note | CDCE62005 as Clock Solution for High-Speed ADCs | Sep. 04, 2008 | |
Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | Jun. 08, 2008 | |
Application note | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | Jun. 02, 2008 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SSOP (DBQ) | 20 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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