18-Bit, 680-kSPS, 1-Ch SAR ADC with True-Differential Input, SPI Interface and Daisy-Chain
Product details
Parameters
Package | Pins | Size
Features
- Sample Rate: 680 kHz
- No Latency Output
- Unipolar, True-Differential Input Range:
–VREF to +VREF - Wide Common-Mode Voltage Range:
0 V to VREF with 90-dB CMRR (min) - SPI™-Compatible Serial Interface with
Daisy-Chain Option - Excellent AC and DC Performance:
- SNR: 100 dB, THD: –115 dB
- INL: ±1.5 LSB (typ), ±3.0 LSB (max)
- DNL: +1.5 and –1 LSB (max), 18-Bit NMC
- Wide Operating Range:
- AVDD: 2.7 V to 3.6 V
- DVDD: 1.65 V to 3.6 V
(Independent of AVDD) - REF: 2.5 V to 5 V (Independent of AVDD)
- Operating Temperature: –40°C to +85°C
- Low-Power Dissipation:
- 4.2 mW at 680 kSPS
- 0.6 mW at 100 kSPS
- 60 µW at 10 kSPS
- Power-Down Current (AVDD): 50 nA
- Full-Scale Step Settling to 18 Bits: 540 ns
- Packages: MSOP-10 and SON-10
Description
The ADS8883 is an 18-bit, 680-kSPS, true-differential input, analog-to-digital converter (ADC). The device operates with a 2.5-V to 5-V external reference, offering a wide selection of signal ranges without additional input signal scaling. The reference voltage setting is independent of, and can exceed, the analog supply voltage (AVDD).
The device offers an SPI-compatible serial interface that also supports daisy-chain operation for cascading multiple devices. An optional busy-indicator bit makes synchronizing with the digital host easy.
The device supports unipolar, true-differential analog input signals with a differential input swing of –VREF to +VREF. This true-differential analog input structure allows for a common-mode voltage of any value in the range of 0 V to +VREF (when both inputs are within the operating input range of –0.1 V to VREF + 0.1 V).
Device operation is optimized for very low-power operation. Power consumption directly scales with speed. This feature makes the ADS8883 excellent for lower-speed applications.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | 18-Bit, 680-kSPS, Serial Interface, microPower, Miniature, True-Differential Inp datasheet (Rev. A) | Dec. 17, 2013 |
Application note | Circuit for protecting low-voltage SAR ADC from electrical overstress with minim | May 25, 2019 | |
White paper | Voltage-reference impact on total harmonic distortion | Aug. 01, 2016 | |
E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | May 21, 2015 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Features
- Expedites circuit design with analog-to-digital converters (ADCs) and digital-to-analog converters (DACs)
- Noise calculations
- Common unit translation
- Solves common amplifier circuit design problems
- Gain selections using standard resistors
- Filter configurations
- Total noise for common amplifier configurations
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
VSON (DRC) | 10 | View options |
VSSOP (DGS) | 10 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
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Support & training
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