Product details

Resolution (Bits) 20 Number of input channels 1 Sample rate (Max) (kSPS) 1000 Interface type SPI, Enhanced SPI Architecture SAR Input type Differential Multi-channel configuration Rating Catalog Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) -5 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 125 Power consumption (Typ) (mW) 21 Analog voltage AVDD (Min) (V) 3 SNR (dB) 104.5 Analog voltage AVDD (Max) (V) 5.5 INL (Max) (+/-LSB) 3.9 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5
Resolution (Bits) 20 Number of input channels 1 Sample rate (Max) (kSPS) 1000 Interface type SPI, Enhanced SPI Architecture SAR Input type Differential Multi-channel configuration Rating Catalog Reference mode Ext Input range (Max) (V) 5 Input range (Min) (V) -5 Features Daisy-Chainable, Oscillator Operating temperature range (C) -40 to 125 Power consumption (Typ) (mW) 21 Analog voltage AVDD (Min) (V) 3 SNR (dB) 104.5 Analog voltage AVDD (Max) (V) 5.5 INL (Max) (+/-LSB) 3.9 Digital supply (Min) (V) 1.65 Digital supply (Max) (V) 5.5
VQFN (RGE) 24 16 mm² 4 x 4
  • Resolution: 20-Bits
  • High Sample Rate With No Latency Output:
    • ADS8900B: 1-MSPS
    • ADS8902B: 500-kSPS
    • ADS8904B: 250-kSPS
  • Integrated LDO Enables Low-Power, Single-Supply Operation
  • Low Power Reference Buffer with No Droop
  • Excellent AC and DC Performance:
    • SNR: 104.5-dB, THD: –125-dB
    • DNL: ±0.2-ppm, 20-Bit No-Missing-Codes
    • INL: ±1-ppm
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Enhanced-SPI Digital Interface
    • Interface SCLK : 22-MHz at 1-MSPS.
    • Configurable Data Parity Output.
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
  • Resolution: 20-Bits
  • High Sample Rate With No Latency Output:
    • ADS8900B: 1-MSPS
    • ADS8902B: 500-kSPS
    • ADS8904B: 250-kSPS
  • Integrated LDO Enables Low-Power, Single-Supply Operation
  • Low Power Reference Buffer with No Droop
  • Excellent AC and DC Performance:
    • SNR: 104.5-dB, THD: –125-dB
    • DNL: ±0.2-ppm, 20-Bit No-Missing-Codes
    • INL: ±1-ppm
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Enhanced-SPI Digital Interface
    • Interface SCLK : 22-MHz at 1-MSPS.
    • Configurable Data Parity Output.
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 20-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.

The ADS89xxB boosts analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput at lower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies the host’s clocking-in of data there by making it ideal for applications involving FPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.

The ADS89xxB has an internal data parity feature which can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 20-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.

The ADS89xxB boosts analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput at lower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies the host’s clocking-in of data there by making it ideal for applications involving FPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.

The ADS89xxB has an internal data parity feature which can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

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Technical documentation

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Type Title Date
* Data sheet ADS890xB 20-Bit, High-Speed SAR ADCs With Integrated Reference Buffer, and Enhanced Performance Features datasheet (Rev. A) 29 Jun 2017
User guide ADS8900EVM-PDK Evaluation Module (Rev. C) 19 Aug 2021
Application note Powering a dual-supply op amp circuit with one LDO (Rev. A) 07 Mar 2019
Application note High-voltage battery monitor circuit: ±20V, 0–10kHz, 18-bit fully differential (Rev. A) 23 Jan 2019
Application note Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 14 Jun 2018
Technical article Take your ultrasound design to the next level 08 Feb 2018
Application note High-current battery monitor circuit: 0–10A, 0-10kHz, 18 bit 22 Dec 2017
Application note Improving Input Settling for Precision Data Converters 12 Dec 2017
Application note Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters 12 Dec 2017
Application note Simplify Isolation Designs Using an Enhanced-SPI ADC Interface 11 Dec 2017
Technical article Powering up the performance of sensitive test and measurement systems 17 Oct 2017
Application note Dual Bipolar Power-Supply Considerations for Amplifiers 01 Aug 2017
Application note Improving Resolution of SAR ADC 14 Jun 2017
Technical article How to enable high-accuracy CW Doppler through discrete, precision data converters 24 Mar 2017
Technical article Detecting pesky failing batteries before they cause a problem 17 Feb 2017
White paper Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI 08 Nov 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS8900BEVM-PDK — ADS8900B Fully-Differential Input, 20-Bit SAR ADC EVM Performance Demonstration Kit (PDK)

The ADS8900B evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the performance of the ADS8900B successive-approximation register (SAR) analog-to-digital converter (ADC), which is a fully-differential input, 20-bit, 1-MSPS device (...)

Evaluation board

PSIEVM — Precision Signal Injector (PSI) Evaluation Module for Testing ADC Performance

The precision signal injector (PSI) is a platform for evaluating the performance of successive-approximation register (SAR) analog-to-digital converters (ADCs). The board provides a low-distortion, low-noise, 2-kHz input signal for driving the input of the ADC, and pairs with most of the (...)

In stock
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Support software

Precision Signal Injector (PSI) GUI Installer

SBAC170.ZIP (245377 KB)
Simulation model

ADS8900B TINA-TI Transient Spice Model

SBAM302.ZIP (13 KB) - TINA-TI Spice Model
Simulation model

ADS8900B TINA-TI Reference Design

SBAM303.ZIP (91 KB) - TINA-TI Reference Design
Simulation model

ADS890XB IBIS Model (Rev. A)

SBAM305A.ZIP (16 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Calculation tool

ADC-INPUT-CALC — Analog-to-digital converter (ADC) input driver design tool supporting multiple input types

ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and transformer-coupled (...)
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Reference designs

TIDA-01351 — High-Resolution, High-SNR True Raw Data Conversion Reference Design for Ultrasound CW Doppler

This reference design is a continuous wave (CW) signal conditioning for ultrasound imaging systems (64-, 128-, 192-, 256-channel ultrasound system). This design features 20-bit fully differential simultaneous sampling with true raw data available for processing. It consists of a (...)
Reference designs

TIDA-01054 — Multi-Rail Power Reference Design for Eliminating EMI Effects in High Performance DAQ Systems

The TIDA-01054 reference design helps eliminate the performance degrading effects of EMI on Data Acquisition (DAQ) systems greater than 16 bits with the help of the LM53635 buck converter. The buck converter enables the designer to place power solutions close to the signal path without the unwanted (...)
Reference designs

TIDA-01057 — Reference Design Maximizing Signal Dynamic Range for True 10 Vpp Differential Input to 20 bit ADC

This reference design is designed for high performance data acquisition(DAQ) systems to improve the dynamic range of 20 bit differential input ADCs. Many DAQ systems require the measurement capability at a wide FSR (Full Scale Range) in order to obtain sufficient signal dynamic range. Many earlier (...)
Reference designs

TIDA-01056 — 20-bit 1MSPS DAQ Reference Design Optimizing Power Supply Efficiency While Minimizing EMI

This reference design for high performance data acquisition (DAQ) systems optimizes power stage in order to reduce power consumption and minimize the effect of EMI from switching regulator by using LMS3635-Q1 buck converter.  This reference designs yields 7.2% efficiency improvement at most (...)
Reference designs

TIDA-01037 — 20-bit, 1-MSPS Isolator Optimized Data Acquisition Reference Design Maximizing SNR and Sample Rate

TIDA-01037 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design that utilizes two different isolator devices to maximize signal chain SNR and sample rate performance. For signals requiring low jitter, such as ADC sampling clocks, TI’s ISO73xx family of low jitter devices (...)
Reference designs

TIDA-01035 — 20-bit Isolated Data Acquisition Reference Design Optimizing Jitter for Max SNR and Sample Rate

The TIDA-01035 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design demonstrating how to resolve and optimize performance challenges typical of digitally isolated data acquisition systems.
  • Significantly improves high frequency AC signal chain performance (SNR  and THD) by (...)
Reference designs

TIPD211 — 20-bit, 1-MSPS, 4-Ch Small Form Factor Design for Test and Measurement Applications Reference Design

End equipment such as mixed signal SOC testers, memory testers, battery testers, liquid-crystal display (LCD) testers, benchtop equipment, high-density digital cards, high-density power cards, x-Ray, MRI, and so forth require multiple, fast, simultaneous sampling channels with excellent DC and AC (...)
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VQFN (RGE) 24 View options

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